poroblm with upgrading from cc1101em to cc1101-cc1190em

roy mintz

Other Parts Discussed in Thread: MSP430F5529, CC1101, CC1190

Hi;

I am using msp430f5529 evaluation board and I had used cc1101em with the attached setting (everything is working fine with this setting). I decided to upgrade my system to cc1101-cc1190em for achieving an higher transmitting range by increasing the output power (and I try to use it with the attached new setting) but I unable to receive any data. I would glad to hear what may be the problem and what should I do for solving it.

My jumpers connection is:

vdd->HGM

GDO2->LNA_EN

GDO0->PA_EN

cc1101em setting:

#if TI_CC_RF_FREQ == 868                          // 868 MHz
// Product = CC1101
// Crystal accuracy = 40 ppm
// X-tal frequency = 26 MHz
// RF output power = 12 dBm
// RX filterbandwidth = 58.035000000 kHz
// Return state:  Return to RX state upon leaving either TX or RX
// Datarate = 2.39 kbps
// Modulation =  GFSK
//Modem dev=5.157471kHz
// Manchester enable = (0) Manchester disabled
// RF Frequency = 868.000000 MHz
// Channel spacing = 199.951172 kHz
// Channel number = 0
// Optimization = Sensitivity
// Sync mode = (3) 30/32 sync word bits detected
// Format of RX/TX data = (0) Normal mode, use FIFOs for RX and TX
// CRC operation = (1) CRC calculation in TX and CRC check in RX enabled
// Forward Error Correction = (0) FEC disabled
// Length configuration = (1) Variable length packets, packet length configured by the first received byte after sync word.
// Packetlength = 255
// Preamble count = (2)  4 bytes
// Append status = 1
// Address check = (1) No address check
// FIFO autoflush = 0
// Device address = 0x01
// GDO0 signal selection = ( 6) Asserts when sync word has been sent / received, and de-asserts at the end of the packet
// GDO2 signal selection = (11) Serial Clock
void writeRFSettings(void)
{
    // Write register settings

	 TI_CC_SPIWriteReg(TI_CCxxx0_IOCFG2,   0x0B); // GDO2 output pin config.
	TI_CC_SPIWriteReg(TI_CCxxx0_IOCFG0,   0x06); // GDO0 output pin config.
	TI_CC_SPIWriteReg(TI_CCxxx0_PKTLEN,   0xFF); // Packet length.
	TI_CC_SPIWriteReg(TI_CCxxx0_PKTCTRL1, 0x05); // Packet automation control.
	TI_CC_SPIWriteReg(TI_CCxxx0_PKTCTRL0, 0x05); // Packet automation control.
	TI_CC_SPIWriteReg(TI_CCxxx0_ADDR,     0x01); // Device address.
	 TI_CC_SPIWriteReg(TI_CCxxx0_CHANNR,   0x00); // Channel number.
	TI_CC_SPIWriteReg(TI_CCxxx0_FSCTRL1,  0x06); // Freq synthesizer control.
	TI_CC_SPIWriteReg(TI_CCxxx0_FSCTRL0,  0x00); // Freq synthesizer control.
	TI_CC_SPIWriteReg(TI_CCxxx0_FREQ2,    0x21); // Freq control word, high byte
	TI_CC_SPIWriteReg(TI_CCxxx0_FREQ1,    0x62); // Freq control word, mid byte.
	TI_CC_SPIWriteReg(TI_CCxxx0_FREQ0,    0x76); // Freq control word, low byte.
    TI_CC_SPIWriteReg(TI_CCxxx0_MDMCFG4,  0xF6); // Modem configuration.
    TI_CC_SPIWriteReg(TI_CCxxx0_MDMCFG3,  0x83); // Modem configuration.
    TI_CC_SPIWriteReg(TI_CCxxx0_MDMCFG2,  0x13); // Modem configuration.
    TI_CC_SPIWriteReg(TI_CCxxx0_MDMCFG1,  0x22); // Modem configuration.
    TI_CC_SPIWriteReg(TI_CCxxx0_MDMCFG0,  0xF8); // Modem configuration.
    TI_CC_SPIWriteReg(TI_CCxxx0_DEVIATN,  0x15); // Modem dev
 TI_CC_SPIWriteReg(TI_CCxxx0_MCSM1 ,   0x3C); //MainRadio Cntrl State Machine
    TI_CC_SPIWriteReg(TI_CCxxx0_MCSM0 ,   0x18); //MainRadio Cntrl State Machine
    TI_CC_SPIWriteReg(TI_CCxxx0_FOCCFG,   0x16); // Freq Offset Compens. Config
    TI_CC_SPIWriteReg(TI_CCxxx0_BSCFG,    0x6C); //  Bit synchronization config.
    TI_CC_SPIWriteReg(TI_CCxxx0_AGCCTRL2, 0x03); // AGC control.
    TI_CC_SPIWriteReg(TI_CCxxx0_AGCCTRL1, 0x40); // AGC control.
    TI_CC_SPIWriteReg(TI_CCxxx0_AGCCTRL0, 0x91); // AGC control.
    TI_CC_SPIWriteReg(TI_CCxxx0_FREND1,   0x56); // Front end RX configuration.
    TI_CC_SPIWriteReg(TI_CCxxx0_FREND0,   0x10); // Front end RX configuration.
    TI_CC_SPIWriteReg(TI_CCxxx0_FSCAL3,   0xE9); // Frequency synthesizer cal.
    TI_CC_SPIWriteReg(TI_CCxxx0_FSCAL2,   0x2A); // Frequency synthesizer cal.
    TI_CC_SPIWriteReg(TI_CCxxx0_FSCAL1,   0x00); // Frequency synthesizer cal.
    TI_CC_SPIWriteReg(TI_CCxxx0_FSCAL0,   0x1F); // Frequency synthesizer cal.
    TI_CC_SPIWriteReg(TI_CCxxx0_FSTEST,   0x59); // Frequency synthesizer cal.
    TI_CC_SPIWriteReg(TI_CCxxx0_TEST2,    0x81); // Various test settings.
    TI_CC_SPIWriteReg(TI_CCxxx0_TEST1,    0x35); // Various test settings.
    TI_CC_SPIWriteReg(TI_CCxxx0_TEST0,    0x09); // Various test settings.

}

// PATABLE (12 dBm output power)
extern char paTable[] = {0xC0};
extern char paTableLen = 1;

#endif



The new setting for cc1101-cc1190em is:

#if TI_CC_RF_FREQ == 868                          // 868 MHz
// Crystal accuracy = 40 ppm
// X-tal frequency = 26 MHz
// RF output power = 18 dBm
// RX filterbandwidth = 58.035000000 kHz
// Return state:  Return to RX state upon leaving either TX or RX
// Datarate = 2.39 kbps
// Modulation =  GFSK
//Modem dev=5.157471kHz
// Manchester enable = (0) Manchester disabled
// RF Frequency = 868.000000 MHz
// Channel spacing = 199.951172 kHz
// Channel number = 0
// Optimization = Sensitivity
// Sync mode = (3) 30/32 sync word bits detected
// Format of RX/TX data = (0) Normal mode, use FIFOs for RX and TX
// CRC operation = (1) CRC calculation in TX and CRC check in RX enabled
// Forward Error Correction = (0) FEC disabled
// Length configuration = (1) Variable length packets, packet length configured by the first received byte after sync word.
// Packetlength = 255
// Preamble count = (2)  4 bytes
// Append status = 1
// Address check = (1) No address check
// FIFO autoflush = 0
// Device address = 0x01
// GDO0 signal selection = ( 6) Asserts when sync word has been sent / received, and de-asserts at the end of the packet
// GDO2 signal selection = (11) Serial Clock
void writeRFSettings(void)
{
    // Write register settings

	 TI_CC_SPIWriteReg(TI_CCxxx0_IOCFG2,   0x0B); // GDO2 output pin config.
	TI_CC_SPIWriteReg(TI_CCxxx0_IOCFG0,   0x06); // GDO0 output pin config.
	TI_CC_SPIWriteReg(TI_CCxxx0_FIFOTHR,   0xC7); // 0xC7 FOR TX AND 0x47 FOR RX. 
	TI_CC_SPIWriteReg(TI_CCxxx0_PKTLEN,   0xFF); // Packet length.
	TI_CC_SPIWriteReg(TI_CCxxx0_PKTCTRL1, 0x05); // Packet automation control.
	TI_CC_SPIWriteReg(TI_CCxxx0_PKTCTRL0, 0x05); // Packet automation control.
	TI_CC_SPIWriteReg(TI_CCxxx0_ADDR,     0x01); // Device address.
	 TI_CC_SPIWriteReg(TI_CCxxx0_CHANNR,   0x00); // Channel number.
	TI_CC_SPIWriteReg(TI_CCxxx0_FSCTRL1,  0x06); // Freq synthesizer control.
	TI_CC_SPIWriteReg(TI_CCxxx0_FSCTRL0,  0x00); // Freq synthesizer control.
	TI_CC_SPIWriteReg(TI_CCxxx0_FREQ2,    0x21); // Freq control word, high byte
	TI_CC_SPIWriteReg(TI_CCxxx0_FREQ1,    0x62); // Freq control word, mid byte.
	TI_CC_SPIWriteReg(TI_CCxxx0_FREQ0,    0x76); // Freq control word, low byte.
    TI_CC_SPIWriteReg(TI_CCxxx0_MDMCFG4,  0xF6); // Modem configuration.
    TI_CC_SPIWriteReg(TI_CCxxx0_MDMCFG3,  0x83); // Modem configuration.
    TI_CC_SPIWriteReg(TI_CCxxx0_MDMCFG2,  0x13); // Modem configuration.
    TI_CC_SPIWriteReg(TI_CCxxx0_MDMCFG1,  0x22); // Modem configuration.
    TI_CC_SPIWriteReg(TI_CCxxx0_MDMCFG0,  0xF8); // Modem configuration.
    TI_CC_SPIWriteReg(TI_CCxxx0_DEVIATN,  0x15); // Modem dev
    TI_CC_SPIWriteReg(TI_CCxxx0_MCSM1 ,   0x3C); //MainRadio Cntrl State Machine
    TI_CC_SPIWriteReg(TI_CCxxx0_MCSM0 ,   0x18); //MainRadio Cntrl State Machine
    TI_CC_SPIWriteReg(TI_CCxxx0_FOCCFG,   0x16); // Freq Offset Compens. Config
    TI_CC_SPIWriteReg(TI_CCxxx0_BSCFG,    0x6C); //  Bit synchronization config.
    TI_CC_SPIWriteReg(TI_CCxxx0_AGCCTRL2, 0x03); // AGC control.
    TI_CC_SPIWriteReg(TI_CCxxx0_AGCCTRL1, 0x40); // AGC control.
    TI_CC_SPIWriteReg(TI_CCxxx0_AGCCTRL0, 0x91); // AGC control.
    TI_CC_SPIWriteReg(TI_CCxxx0_FREND1,   0x56); // Front end RX configuration.
    TI_CC_SPIWriteReg(TI_CCxxx0_FREND0,   0x10); // Front end RX configuration.
    TI_CC_SPIWriteReg(TI_CCxxx0_FSCAL3,   0xE9); // Frequency synthesizer cal.
    TI_CC_SPIWriteReg(TI_CCxxx0_FSCAL2,   0x2A); // Frequency synthesizer cal.
    TI_CC_SPIWriteReg(TI_CCxxx0_FSCAL1,   0x00); // Frequency synthesizer cal.
    TI_CC_SPIWriteReg(TI_CCxxx0_FSCAL0,   0x1F); // Frequency synthesizer cal.
    TI_CC_SPIWriteReg(TI_CCxxx0_FSTEST,   0x59); // Frequency synthesizer cal.
    TI_CC_SPIWriteReg(TI_CCxxx0_TEST2,    0x81); // Various test settings.
    TI_CC_SPIWriteReg(TI_CCxxx0_TEST1,    0x2D); // 0x2D for TX and 0x35 for RX
    TI_CC_SPIWriteReg(TI_CCxxx0_TEST0,    0x09); // Various test settings.

}

// PATABLE (18 dBm output power)
extern char paTable[] = {0x27};
extern char paTableLen = 1;

#endif

over 11 years ago

0 TER over 11 years ago

TI__Guru**** 317180 points

First, don't double post, I deleted your second post.

From what you have written you have by jumper set CC1101 to control the CC1190 but you register settings does not reflect that. Use the MCU to control the CC1190 and check that you have the correct voltage on PA_EN and LNA_EN.

0 roy mintz over 11 years ago in reply to TER

Prodigy 130 points

Ter thanks for your replay,

I am sorry but I don't understand your answer can you clarify it. I used the smartRf studio program for determine the register. What register setting should I change? (My module is: http://www.ti.com/tool/CC1101CC1190EMK868)

According to what I understand GDO0 and GDO2 are used to control the cc1101 and the cc1190 together at the same time. therefore what should I change in the use of GDO0 and GDO2 ?

0 TER over 11 years ago in reply to roy mintz

TI__Guru**** 317180 points

GDO0 and GDO2 are general IOs on CC1101. They are typically used to generate interrupts to tell the MCU that a packet has been received or sent and other signals that are helpful when making a radio system.

CC1190 needs 2 or 3 control signals, dependent on if you want to hardwire the HGM pin or not. For CC1101 systems it could be beneficial to control the HGM pin from the MCU in Rx when the receive signal is strong to avoid saturation. Hence there is need of one more IO signal to control CC1190 than CC1101 has IOs. Therefore to enable an interrupt based system, you should let your MCU control the 3 control signal for CC1190. Then use the default jumper config on the EM ( Press F1 in SmartRF Studio, see under range extender)

Sub-1 GHz

Sub-1 GHz forum

poroblm with upgrading from cc1101em to cc1101-cc1190em