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External interrupt SimpliciTI

Other Parts Discussed in Thread: SIMPLICITI

HI there

I have set up a an endpoint and an AP. The endpoint sends regular periodic messages (using timer 0 wit interrupt) to the AP. This is stable and works well. I then added an interrupt on on the Port 2.0 pin (port 2 pin 0). Both the wireless stack work and the interrupt work independently with out any problems. However as soon as an external interrupt occurs, the endpoint is no longer able to see the ACKs from the AP. The wireless stack seems to lose its RF Rx ability? If no interrupt occurs then the system continues to operate correctly.

I am using the packet sniffer and can see the the end point send out its preiodic message, as well as the ACK from the AP. The RF Tx appears to be working as the AP can understand the messages, but the endpoint not.

My code is based on the AP as Data Hub  example. Using SimpliciTI 1.2.0 on CC1110 mini dev kit.

End point interrupt initialisation:

//Setting up the input pin direction (Power meter interrupt)
IO_DIR_PORT_PIN(2, 0, IO_IN);
IO_IMODE_PORT_PIN(2, 0, IO_IMODE_TRI);
IO_FUNC_PORT_PIN(2, 0, IO_FUNC_GIO);

//Power out to power meter
IO_DIR_PORT_PIN(0, 7, IO_OUT);
IO_FUNC_PORT_PIN(0, 7, IO_FUNC_GIO);
P0 |= 0x80;

// Setting up and enabling external interrupt on PIN 2
P2IFG = 0x00;
PICTL |= 0x20; //Bit 2 = 0 => Rising edge on input gives interrupt, Bit 5 = 1 = > Interrupts are enabled
INT_ENABLE(INUM_P2INT, INT_ON); // Enabling interrupt from P2
P2IF = 0;

Then for the interrupt service routine:

_Pragma ("vector = P2INT_VECTOR") __near_func __interrupt void p2_ISR(void)
{
P2IFG &= ~0x08; // Clear status flag for pin
P2IFG &= ~0x04; // Clear status flag for pin
P2IFG &= ~0x02; // Clear status flag for pin

if ((P2IFG & 0x01))
{
P2IFG &= ~0x01; // Clear status flag for pin

//Rising edge changed to a falling edge trigger
if(!(PICTL & 0x04))
{
PICTL |= 0x04; //Change to a falling edge
BSP_TURN_ON_LED2();
}
else
{
PICTL &= ~0x04; //Change to a rising edge
BSP_TURN_OFF_LED2();
}
}

P2IF = 0; // Clear CPU interrupt status flag for P2
}

It appears as though the interrupt ISR is not clearing the interrupt correctly or distroying some interrupt that the RF core requires? Please help! Thanks in advance.

  • Hi Derek,

    if you break the code after receiving an external interrupt, are you always in the interrupt routine?

    If so, clear both the P2IFG and the P2IF flag in the IRCON2 register, in that order. The first is for the module, and the other is what is fed to the CPU.

    Best regards,

    Niklas