CC1120 infinite packet mode

Kirill Germanov

Hi, TI community!

I'm trying to understand the principle of working of infinite packet transmission. I read TI code example (www.ti.com/lit/zip/swrc253) about it. Now I stuck on FIFO principle of working. What's going on in example:

// Fill up the TX FIFO

cc112xSpiWriteTxFifo(txBuffer, FIFO_SIZE);

// Enter TX mode
trxSpiCmdStrobe(CC112X_STX);

When FIFO fills over threshold TXFIFO_THR(FIFO_THR = 120) signal toggles from 0 to 1. Then, transmit occures and FIFO draines. And I can't understand when TXFIFO_THR signal toggles from 1 to 0. Is it when it draines above 7 (127 - FIFO_THR)? In interrupt FIFO fills by 122 bytes. But in my mind only 7 bytes are available for write. When I guided FIFO principles (first in first out), I can't understand this implementation. Can someone explain how it works?

over 10 years ago

0 Vihang Parmar over 10 years ago

TI__Mastermind 29291 points

Hi Kirill,

If you look at the description of FIFO_CFG.FIFO_THR in the CC112X user's guide, FIFO_THR=120 means that there are 7 bytes in the TX FIFO and 121 bytes in RX FIFO. (Section 8.6 explains this in detail.)

So in the example code every time the TX_FIFO drains below 7 (6 bytes left in the TX_FIFO), the interrupt will fill 122 bytes to the other end of the FIFO of the size of 128 bytes. Thus, we have refilled the FIFO with 6+122=128 bytes and we can keep doing this until 500 bytes are sent.

Vihang

0 Kirill Germanov over 10 years ago in reply to Vihang Parmar

Intellectual 540 points

Thank you, Vihang! You helped me a lot!

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CC1120 infinite packet mode