Hello sirs,
I have a question for the CC1200 AGC_CFG1 setting.
CC1200 is input -73dBm unmodulated signal.
When AGC_CFG1 is set to 0x51, the read RSSI is stable.
However, when AGC_CFG1 is set to 0x40 (AGC_WIN_SIZE and AGC_SETTLE_WAIT are 0), the read RSSI is not stable.
Please let me know why the read RSSI is not stable when AGC_CFG1 is set to 0x40.
All other settings are following.
static const registerSetting_t preferredSettings[]=
{
{CC1200_IOCFG2, 0x08},
{CC1200_IOCFG0, 0x09},
{CC1200_SYNC_CFG1, 0xA8},
{CC1200_DEVIATION_M, 0x9D},
{CC1200_MODCFG_DEV_E, 0x08},
{CC1200_DCFILT_CFG, 0x5D},
{CC1200_PREAMBLE_CFG1, 0x00},
{CC1200_PREAMBLE_CFG0, 0x8A},
{CC1200_IQIC, 0xCB},
{CC1200_CHAN_BW, 0x61},
{CC1200_MDMCFG1, 0x00},
{CC1200_MDMCFG0, 0x05},
{CC1200_SYMBOL_RATE2, 0x5F},
{CC1200_SYMBOL_RATE1, 0x75},
{CC1200_SYMBOL_RATE0, 0x10},
{CC1200_AGC_REF, 0x33},
{CC1200_AGC_CS_THR, 0xEC},
{CC1200_AGC_CFG3, 0x11},
{CC1200_AGC_CFG1, 0x51},
{CC1200_AGC_CFG0, 0x87},
{CC1200_FIFO_CFG, 0x00},
{CC1200_FS_CFG, 0x14},
{CC1200_PKT_CFG2, 0x01},
{CC1200_PKT_CFG1, 0x00},
{CC1200_PKT_CFG0, 0x20},
{CC1200_PA_CFG1, 0x76},
{CC1200_PKT_LEN, 0xFF},
{CC1200_IF_MIX_CFG, 0x1C},
{CC1200_FREQOFF_CFG, 0x22},
{CC1200_MDMCFG2, 0x0C},
{CC1200_FREQ2, 0x55},
{CC1200_FREQ1, 0x40},
{CC1200_FREQ0, 0xA4},
{CC1200_IF_ADC1, 0xEE},
{CC1200_IF_ADC0, 0x10},
{CC1200_FS_DIG1, 0x07},
{CC1200_FS_DIG0, 0xAF},
{CC1200_FS_CAL1, 0x40},
{CC1200_FS_CAL0, 0x0E},
{CC1200_FS_DIVTWO, 0x03},
{CC1200_FS_DSM0, 0x33},
{CC1200_FS_DVC0, 0x17},
{CC1200_FS_PFD, 0x00},
{CC1200_FS_PRE, 0x6E},
{CC1200_FS_REG_DIV_CML, 0x1C},
{CC1200_FS_SPARE, 0xAC},
{CC1200_FS_VCO0, 0xB5},
{CC1200_XOSC5, 0x0E},
{CC1200_XOSC1, 0x03},
{CC1200_PARTNUMBER, 0x20},
{CC1200_PARTVERSION, 0x10},
{CC1200_SERIAL_STATUS, 0x08},
{CC1200_MODEM_STATUS1, 0x10},
};
Best Regards,
Nomoto