I'm doing FCC testing for Part 15.247. Device is a CC1110 with CC1190 PA. Setting are 2FSK, 38.4K, 178KHz deviation. PSD measurements are reading about 1dB below peak power. This means I have to set my output power to less than 9dBm out to pass teh SPD limit of 8dBm. Are there any setting I can change to try and bring the PSD down? This design is supposed to be FCC compliant at about 17dB out.
<rfparameters>
<Property name="Xtal frequency" role="46">27.000000</Property>
</rfparameters>
<Register>
<Name>PKTCTRL0</Name>
<Value>0x22</Value>
</Register>
<Register>
<Name>FSCTRL1</Name>
<Value>0x06</Value>
</Register>
<Register>
<Name>FREQ2</Name>
<Value>0x21</Value>
</Register>
<Register>
<Name>FREQ1</Name>
<Value>0xB4</Value>
</Register>
<Register>
<Name>FREQ0</Name>
<Value>0x25</Value>
</Register>
<Register>
<Name>MDMCFG4</Name>
<Value>0xCA</Value>
</Register>
<Register>
<Name>MDMCFG3</Name>
<Value>0x75</Value>
</Register>
<Register>
<Name>MDMCFG2</Name>
<Value>0x00</Value>
</Register>
<Register>
<Name>CHANNR</Name>
<Value>0x00</Value>
</Register>
<Register>
<Name>DEVIATN</Name>
<Value>0x65</Value>
</Register>
<Register>
<Name>MCSM0</Name>
<Value>0x18</Value>
</Register>
<Register>
<Name>FOCCFG</Name>
<Value>0x16</Value>
</Register>
<Register>
<Name>AGCCTRL2</Name>
<Value>0x43</Value>
</Register>
<Register>
<Name>FREND0</Name>
<Value>0x10</Value>
</Register>
<Register>
<Name>FSCAL3</Name>
<Value>0xE9</Value>
</Register>
<Register>
<Name>FSCAL2</Name>
<Value>0x2A</Value>
</Register>
<Register>
<Name>FSCAL1</Name>
<Value>0x00</Value>
</Register>
<Register>
<Name>FSCAL0</Name>
<Value>0x1F</Value>
</Register>
<Register>
<Name>TEST2</Name>
<Value>0x88</Value>
</Register>
<Register>
<Name>TEST1</Name>
<Value>0x31</Value>
</Register>
<Register>
<Name>TEST0</Name>
<Value>0x09</Value>
</Register>
<Register>
<Name>PA_TABLE0</Name>
<Value>0x8f</Value>
</Register>
