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Impact of SPI clock for RF performance on CC1200

Nomo
Guru 16800 points
Other Parts Discussed in Thread: CC1200

Hello,

Please let me know whether SPI clock impacts the RF performance of CC1200.
Especially, I want to know whether SPI clock causes the deterioration of sensitivity.

Best Regards,

Nomoto

  • 0
    TI__Guru**** 317180 points
    Your question indicate that you see some sensitivity degradation. How do you use the chip? If you use the FIFO you will not have SPI traffic when receiving a packet so you will not see any degradation. We have not tested how the SPI clock impact on the performance if serial mode is used.
  • 0 in reply to TER
    Guru 16800 points

    Hello TER-san,

    Thank you for your reply.
    My customer uses FIFO; therefore, there is another factor to occur degradation.

    Best Regards,

    Nomoto

  • 0 in reply to Nomo
    TI__Guru**** 317180 points
    What kind of degradation do they see?
  • 0 in reply to TER
    Guru 16800 points

    Hello TER-san,

    Thank you for your reply.

    I recognize the just only following information.
    If data is read via SPI with PKT_SYNC_RXTX asserted, the packet losses occur.
    I think that the timing of read is early; because, assertion of PKT_SYNC_RXTX indicates only sync word detection (PKT_SYNC_RXTX doesn't indicate whether data is in FIFO).

    Best Regards,

    Nomoto

  • 0 in reply to Nomo
    TI__Guru**** 317180 points
    As you see from our software examples we have the packet received interrupt on falling edge to avoid starting to do SPI access before the packet is fully received.