Hi!
I'm using ti-rtos 2.20.0.06 on a cc1310 for an ultra low power application. The cc1310 is consuming about 450uA while all tasks are sleeping, which is much higher than the number published in the cc1310 data-sheet for standby mode. I double checked all the GPIO configuration and verified using oscilloscope and a logic analyzer that there is no leakage into or from the pins. I'm using the following power config.:
const PowerCC26XX_Config PowerCC26XX_config = { .enablePolicy = true, .policyInitFxn = NULL, .policyFxn = &PowerCC26XX_standbyPolicy, .calibrateFxn = &PowerCC26XX_calibrate,PowerCC26XX_SB_DISALLOW .calibrateRCOSC_LF = true, .calibrateRCOSC_HF = true };
In ccfg.c I have the following line setting the LF OSC SRC to LF XOSC
#define SET_CCFG_MODE_CONF_SCLK_LF_OPTION 0x2
I call Power_getConstraintMask() right before Task_sleep and the function always returns 4, which is (1<<PowerCC26XX_SB_DISALLOW). Am I getting this right: as long as Power_getConstraintMask() returns a non-zero value, the cc1310 is not allowed to go in standby mode? I even tried Power_releaseConstraint(PowerCC26XX_SB_DISALLOW) before calling Task_sleep() which didn't change anything.
In this code in POWER26XX.c:Power_init() (lines 318-326) the if-condition is always true in my case:
/* * if LF source is RCOSC_LF or XOSC_LF: assert the SB_DISALLOW constraint * and start a timeout to check for activation */ if ((ccfgLfClkSrc == CCFGREAD_SCLK_LF_OPTION_RCOSC_LF) || (ccfgLfClkSrc == CCFGREAD_SCLK_LF_OPTION_XOSC_LF)) { /* disallow STANDBY pending LF clock quailifier disabling */ Power_setConstraint(PowerCC26XX_SB_DISALLOW);
I don't quite understand why is the SB_DISALLOW constraint is set here, even thought the LF OSC isn't derived from the HF OSC as required to enter standby mode.
I'd appreciate any help!
Best regards
Eqbal