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CC1310: Data rate offset tolerance

Part Number: CC1310
Other Parts Discussed in Thread: CC110L,

Hello,

we are trying to integrate a device using the CC1310 transceiver into an existing ecosystem of devices using different transceivers. Most of these devices use a data rate of 20.4kBaud, but some use 20.8kBaud. Compatibility has not been an issue before, since the transceivers used offered the ability to compensate for data rate offset. For example: one of the transceivers used in our system is the CC110L, it offers programmable data rate offset tolerance of up to 3.125% (BS_LIMIT[1:0]).

The CC1310 however seems to have a fixed data rate offset tolerance of typically 1600ppm. Is there an override or a patch to change this? We require higher tolerance to make the CC1310 work in our system. We can not change the data rate of other devices since they are already deployed.

Best regards

  • 2% data rate offset is challenging, if not impossible, without a patch. We do not have a generic patch that supports 2% data rate offset. We have patches that supports specific protocols with up to 12% data rate offset tolerance, but they are not applicable in this case.

    There is a register that can be tested. Address 0x4004 50C8. We have not performed any detailed testing with changes to this register.
    [9:7]: Symbol timing error accumulator period (from 4 to 128 symbols)
    [6:4]: Symbol timing error accumulator gain (from 1/512 to 1/4)

    Set gain to max (0x7). Start with max period (=0x5) and test with all settings down to 0. Use long packet lengths.

    The register can be changed through a HW_REG_OVERRIDE, but make sure to keep all other bit fields than [9:4] unchanged.

    A patch could be an option, but only if the volumes justify the development. Please drop me a PM if you want to discuss this privately.
  • Thank you Sverre, I will try that register. Can you elaborate on how to use the HW_REG_OVERRIDE command? I could not find any information about it in the reference manual.

    I understand that the command is HW_REG_OVERRIDE(a, b), where a and b are 16 bit each. I assume a is the address, and b is the value to be written to this address. According to the reference manual the first register address is 0x40040000, so am I right in assuming that I need to put just 0x50C8 as a? So, for max gain and max period, would the command be HW_REG_OVERRIDE(0x50C8, 0x02F0)?

  • You are correct regarding the override.

    Note that you can also use the "override editor" in SmartRF Studio. Top right hand corner when you have ticked off "command view"
  • Thanks. I tried the override, but it doesn't seem to help. I've also tried PMing you, but when I try to put you as a recipient of the message it always says "No matches were found". In regard to the patch, what sort of volume are we talking about?
  • I haven't got it, I'm afraid. Can't we do this via E-Mail?