CC1200: CC1200 Sync Word

With a short sync word it's more likely to find the sync word in noise. Which sync word have you selected, what have you set the sync threshold to and have you tried strict sync word search?

TER,
Sync word we selected is the one default by SmartRF Studio. We did try 2 bytes preamble, 11 bits SYNC Word with sync threshold to be 0x04, sync strict level 1 but it works with PER greater than 50%. And with sync word strict level 2 receive packets less frequently.

-Pawan

- Is 2 byte sync a requirement?

- Could you post the full register settings you are using? Preferably as a SmartRF Studio XML file since this makes it easier to review.

// Rf settings for CC1200

RF_SETTINGS code rfSettings = {

0x06, // IOCFG2 GPIO2 IO Pin Configuration

0x24, // SYNC_CFG1 Sync Word Detection Configuration Reg. 1

0x47, // DEVIATION_M Frequency Deviation Configuration

0x2F, // MODCFG_DEV_E Modulation Format and Frequency Deviation Configur..

0x1E, // DCFILT_CFG Digital DC Removal Configuration

0x10, // PREAMBLE_CFG1 Preamble Length Configuration Reg. 1

0x8A, // PREAMBLE_CFG0 Preamble Detection Configuration Reg. 0

0x00, // IQIC Digital Image Channel Compensation Configuration

0x01, // CHAN_BW Channel Filter Configuration

0x42, // MDMCFG1 General Modem Parameter Configuration Reg. 1

0x05, // MDMCFG0 General Modem Parameter Configuration Reg. 0

0xC9, // SYMBOL_RATE2 Symbol Rate Configuration Exponent and Mantissa [1..

0x99, // SYMBOL_RATE1 Symbol Rate Configuration Mantissa [15:8]

0x99, // SYMBOL_RATE0 Symbol Rate Configuration Mantissa [7:0]

0x2F, // AGC_REF AGC Reference Level Configuration

0xF8, // AGC_CS_THR Carrier Sense Threshold Configuration

0x60, // AGC_CFG2 Automatic Gain Control Configuration Reg. 2

0x12, // AGC_CFG1 Automatic Gain Control Configuration Reg. 1

0x84, // AGC_CFG0 Automatic Gain Control Configuration Reg. 0

0x00, // FIFO_CFG FIFO Configuration

0x1A, // FS_CFG Frequency Synthesizer Configuration

0x00, // PKT_CFG2 Packet Configuration Reg. 2

0x0C, // PKT_LEN Packet Length Configuration

0x23, // FREQOFF_CFG Frequency Offset Correction Configuration

0x00, // MDMCFG2 General Modem Parameter Configuration Reg. 2

0x54, // FREQ2 Frequency Configuration [23:16]

0x80, // FREQ1 Frequency Configuration [15:8]

0xEE, // IF_ADC1 Analog to Digital Converter Configuration Reg. 1

0x10, // IF_ADC0 Analog to Digital Converter Configuration Reg. 0

0x04, // FS_DIG1 Frequency Synthesizer Digital Reg. 1

0xA3, // FS_DIG0 Frequency Synthesizer Digital Reg. 0

0x40, // FS_CAL1 Frequency Synthesizer Calibration Reg. 1

0x0E, // FS_CAL0 Frequency Synthesizer Calibration Reg. 0

0x03, // FS_DIVTWO Frequency Synthesizer Divide by 2

0x33, // FS_DSM0 FS Digital Synthesizer Module Configuration Reg. 0

0xF7, // FS_DVC1 Frequency Synthesizer Divider Chain Configuration ..

0x0F, // FS_DVC0 Frequency Synthesizer Divider Chain Configuration ..

0x00, // FS_PFD Frequency Synthesizer Phase Frequency Detector Con..

0x6E, // FS_PRE Frequency Synthesizer Prescaler Configuration

0x1C, // FS_REG_DIV_CML Frequency Synthesizer Divider Regulator Configurat..

0xAC, // FS_SPARE Frequency Synthesizer Spare

0xB5, // FS_VCO0 FS Voltage Controlled Oscillator Configuration Reg..

0x0D, // IFAMP Intermediate Frequency Amplifier Configuration

0x0E, // XOSC5 Crystal Oscillator Configuration Reg. 5

0x03, // XOSC1 Crystal Oscillator Configuration Reg. 1

};

TER,
2 bytes sync is not a requirement. We want to squeeze the 12 bytes with minimum overheads and minimum PER. If you can suggest us to get it will be helpful.

-Pawan