Hi, we are now testing with SCE RAM (AUX_RAM in TRM) on our CC1352R to store critical processing information before resetting, then read out the info after reset.
In the linker file (cmd). We added AUX_RAM and scrachpad section.
#define FLASH_BASE 0x0 #define FLASH_SIZE 0x58000 #define RAM_BASE 0x20000000 #define RAM_SIZE 0x14000 #define GPRAM_BASE 0x11000000 #define GPRAM_SIZE 0x2000 #define AUX_RAM_BASE 0x400E0000 #define AUX_RAM_SIZE 0x1000 /* System memory map */ MEMORY { /* Application stored in and executes from internal flash */ FLASH (RX) : origin = FLASH_BASE, length = FLASH_SIZE /* Application uses internal RAM for data */ SRAM (RWX) : origin = RAM_BASE, length = RAM_SIZE /* Application can use GPRAM region as RAM if cache is disabled in the CCFG (DEFAULT_CCFG_SIZE_AND_DIS_FLAGS.SET_CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM = 0) */ GPRAM (RWX): origin = GPRAM_BASE, length = GPRAM_SIZE ARAM (RWX) : origin = AUX_RAM_BASE, length = AUX_RAM_SIZE } /* Section allocation in memory */ SECTIONS { .intvecs : > FLASH_BASE .text : >> FLASH .TI.ramfunc : {} load=FLASH, run=SRAM, table(BINIT) .const : >> FLASH .constdata : >> FLASH .rodata : >> FLASH .binit : > FLASH .cinit : > FLASH .pinit : > FLASH .init_array : > FLASH .emb_text : >> FLASH .ccfg : > FLASH (HIGH) .vtable : > SRAM .vtable_ram : > SRAM vtable_ram : > SRAM .data : > SRAM .bss : > SRAM .sysmem : > SRAM .stack : > SRAM (HIGH) .nonretenvar : > SRAM .scratchpad : > ARAM /* Heap buffer used by HeapMem */ .priheap : { __primary_heap_start__ = .; . += HEAPSIZE; __primary_heap_end__ = .; } > SRAM align 8 .gpram : > GPRAM }
Added the following in the source file.
#pragma DATA_SECTION(bufferB, ".scratchpad")
The ARAM section can also be seen at 'Memory allocation' tab during debug session, we also observed memory browser and the values are there before reset.
However, every time after executing SysCtrlSystemReset(), AUX_RAM will be re-initialized to all zero. But seems that 'AUX_RAM is not cleared to zeroes between system resets'. So how can we manage to retain those data between system reset?