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CC1310: Cannot map 32-kHz System Clock to DIO when using external LF clock

Part Number: CC1310

Hi,

One of my customer want to use external LF clock to get a more precise LF system clock.

He did below modification in CCFG file, and want to check whether the external LF clock is really used as LF system clock by mapping 32-kHz system clock to DIO and counting pulses in that DIO.

#define SET_CCFG_MODE_CONF_SCLK_LF_OPTION            0x1        // External LF clock

#define SET_CCFG_EXT_LF_CLK_DIO                         0x01       // DIO number if using external LF clock

But, he got below errors during online debugging, it seems the chip is reset. Offline running got similar phenomenon that chip reset ceaselessly.

ortex_M3_0: GEL Output: Memory Map Initialization Complete.
Cortex_M3_0: GEL Output: Board Reset Complete.
Cortex_M3_0: Can't Run Target CPU: (Error -2134 @ 0x0) Unable to control device execution state. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 7.0.188.0)
Cortex_M3_0: JTAG Communication Error: (Error -1170 @ 0x0) Unable to access the DAP. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 7.0.188.0)

Is there any limitation in mapping 32-kHz system clock to DIO? and what the suggested way to confirm that external 32-kHz is indeed used as LF system clock?

Thanks!

Felix

  • Have you made sure that your external 32 kHz source is running when starting your application and that the DIO you use for the external clock is not configured anywhere else in your application? When I tested this I used one LP(LP1) running one of our examples from the SDK and modified it to output the 32 kHz clock on Board_PIN_LED0:

    IOCPortConfigureSet(Board_PIN_LED0, IOC_PORT_AON_CLK32K, IOC_STD_OUTPUT);
    AONIOC32kHzOutputEnable();

    On the other LP (LP2) that I wanted to run on external 32 kHz clock, I modified the CCFG as follows:

    #define SET_CCFG_MODE_CONF_SCLK_LF_OPTION 0x1 // External LF clock
    #define SET_CCFG_EXT_LF_CLK_DIO           21  // Use DIO 21 as input for external LF clock
    

    I then made sure that the two LPs had common ground and connected Board_PIN_LED0 on LP1 to DIO21 on LP2.

    I hade to power up LP1 before LP2 to make sure that the 32 kHz was running when starting the application.

  • Hi, Siri,

    Thanks for your reply.

    I have re-produced the issue that my customer reported.

    And I set up the same test platform as you did. Use Launchpad A(using LF XOSC as its LF SCLK) to output its 32kHz system clock through DIO14, ans then, in Launchpad B(using external LF clock as its LF SCLK from DIO1), and connect DIO14 of Launchpad A to DIO1 of Launchpad B.

    When running empty project from SDK, the program runs normally, the LED blinks normally. Then, I add below statements, and then programmed into Launchpad B and step over each statement. It runs normally before running IOCPortConfigureSet(), and then, it crashes.

    IOCPortConfigureSet(Board_PIN_LED0, IOC_PORT_AON_CLK32K, IOC_STD_OUTPUT);
    AONIOC32kHzOutputEnable();

     

  • I think I have checked this before and concluded that it was not possible. Even if you were able to use DIOx as an input for a 32 kHz signal and then output it on DIOy you don't prove that the 32 kHz you get on the output is actually used by the core.
  • Hi, TER

    So how to prove that the external LF is used as LF system clock, and how to test its precision?

    Thanks!

    Felix

  • I believe that if you set the external clock to something else than 32.768 kHz you should be able to detect that the tick rate is different indirectly by monitoring thes sleep periode. (setting it differently is just for test purposes )