Hi,
One of my customer want to use external LF clock to get a more precise LF system clock.
He did below modification in CCFG file, and want to check whether the external LF clock is really used as LF system clock by mapping 32-kHz system clock to DIO and counting pulses in that DIO.
#define SET_CCFG_MODE_CONF_SCLK_LF_OPTION 0x1 // External LF clock
#define SET_CCFG_EXT_LF_CLK_DIO 0x01 // DIO number if using external LF clock
But, he got below errors during online debugging, it seems the chip is reset. Offline running got similar phenomenon that chip reset ceaselessly.
ortex_M3_0: GEL Output: Memory Map Initialization Complete.
Cortex_M3_0: GEL Output: Board Reset Complete.
Cortex_M3_0: Can't Run Target CPU: (Error -2134 @ 0x0) Unable to control device execution state. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 7.0.188.0)
Cortex_M3_0: JTAG Communication Error: (Error -1170 @ 0x0) Unable to access the DAP. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 7.0.188.0)
Is there any limitation in mapping 32-kHz system clock to DIO? and what the suggested way to confirm that external 32-kHz is indeed used as LF system clock?
Thanks!
Felix