CC1200EMK-868-930: Read/Write odd behaviour

Hi,
I'm using a F28379D with a CC1200EMK. Reading and writing from a single (non extended) register seems to behave in an odd way. For example, when I read/write to IOCFG3, 0x01, 0x06 and 0x03 work, but 0x02 and 0x04 fail. Also, when I try this with other registers, sometimes it fails. I'll post two examples below, one of the IOCFG3 and one of CHAN BW registers.

My process currently is: 

Pull CSN low, wait for MISO to go high, delay 0.5 Us, start transmission. Write to the address. Once done, Read from the address. 

Some additional information: I'm using the C2000Ware Driverlib for my SPI. 4 MHz clock speed. SPIA_LOW and SPIA_HIGH etc use an external GPIO for the CS_n of the CC1200.

The status returned with both of these tests is 0x60.

Code:  (ICOFG3)

    while ( final_value != 0x03) // To repeat this with a breaking point
 {

        SPIA_LOW;
        SPIA_WAIT;
        DEVICE_DELAY_US(1);

        // WRITE TO ADDRESS

        SPI_writeDataBlockingNonFIFO( current_base, 0x0000); // IOCFG3
        DEVICE_DELAY_US(0.5); // Delay
        SPI_writeDataBlockingNonFIFO(current_base, 0x02<<8);

        // READ FROM ADDRESS
        DEVICE_DELAY_US(1);
        SPI_writeDataBlockingNonFIFO(current_base, 0x80<<8);
        write_return_value = SPI_readDataNonBlocking(current_base);
        DEVICE_DELAY_US(0.5);
        write_return_value_2 = SPI_readDataNonBlocking(current_base);

        //SEND A DUMMY BYTE

        SPI_writeDataBlockingNonFIFO(current_base, 0xFF<<8);
        DEVICE_DELAY_US(0.5);
        before_final_value = SPI_readDataNonBlocking(current_base);
        DEVICE_DELAY_US(0.5);
        final_value = SPI_readDataNonBlocking(current_base);

        SPIA_HIGH;
        DEVICE_DELAY_US(10);
    }

Another example with CHANBW register, this code returns 0xF7

    while ( final_value != 0x03) {

        SPIA_LOW;
        SPIA_WAIT;
        DEVICE_DELAY_US(1);

        // WRITE TO ADDRESS

        SPI_writeDataBlockingNonFIFO( current_base, (CC120X_CHAN_BW | CC1200_WRITE_BIT) << 8); // IOCFG3
        DEVICE_DELAY_US(0.5); // Delay
        SPI_writeDataBlockingNonFIFO(current_base, 0xA6<<8);

        // READ FROM ADDRESS
        DEVICE_DELAY_US(1);
        SPI_writeDataBlockingNonFIFO(current_base, (CC120X_CHAN_BW | CC1200_READ_BIT) <<8);
        write_return_value = SPI_readDataNonBlocking(current_base);
        DEVICE_DELAY_US(0.5);
        write_return_value_2 = SPI_readDataNonBlocking(current_base);

        //SEND A DUMMY BYTE

        SPI_writeDataBlockingNonFIFO(current_base, 0xFF<<8);
        DEVICE_DELAY_US(0.5);
        before_final_value = SPI_readDataNonBlocking(current_base);
        DEVICE_DELAY_US(0.5);
        final_value = SPI_readDataNonBlocking(current_base);

        SPIA_HIGH;
        DEVICE_DELAY_US(10);
    }