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CC1350: Consequence of high VDDS slew rate

Jonathan Reichelt Gjertsen
Prodigy 70 points
Part Number: CC1350


Hello

I have an application where the input on VDDS will rise and fall with slew rates close to (and sometimes beyond) the limits specified in the datasheet. In some cases, I observe that VDDR then drops to below 1.65V and the CC1350 subsequently reboots due to brown-out detection (see screenshot from Saleae Logic at the bottom). I have a few questions related to this:

  • Is this the expected behaviour in this case?
  • If so, what exactly is causing VDDR to drop?
  • The problem does not seem to occur when using GLDO instead of the internal DC/DC converter. Can the GLDO handle higher slew rates than the internal DC/DC converter can? 

  • 0
    TI__Guru** 106705 points
    Hi Jonathan,

    This is not expected behaviour. Let me run this by R&D and come back to you.

    Regards,
    Fredrik
  • 0
    TI__Guru** 106705 points
    Hi Jonathan,

    What is causing the VDDS drop, is it internal to the IC, or caused by external circuitry?

    Would it be possible to do a capture of the DCDC-SW pin when the problem happens? It would be interesting to see if there are any irregularities in the switching pattern.

    Regards,
    Fredrik
  • 0 in reply to Fredrik K
    Prodigy 70 points

    VDDS is controlled by external circuitry.

    I have taken a few captures with the DCDC-SW pin (good idea!) at 50 MHz, please see the screenshots below. They are in order:

    1. Positive transient when the fault does NOT occur (no VDDR brownout)
    2. Positive transient when the fault occurs
    3. Zoomed-out view of the ~millisecond just before the positive transient, when the fault occurs
    4. Zoomed-out view of the ~millisecond just after the positive transient, when the fault occurs. On the very right side, the CPU has rebooted after brownout and started up the DCDC again.

    I will try to catch a similar failure that occurs when VDDS is falling quickly as well (like in the capture I posted in the first post).

  • 0 in reply to Jonathan Reichelt Gjertsen
    TI__Guru**** 317180 points
    Which state is the chip in when this happens and is something connected to VDDR except for the chip it self?