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CC1310: Issues with send/recv at 5.0 kbps

VICTOR VALENCIA
Expert 1070 points
Part Number: CC1310

Hi All,

   I have a system that uses a custom 1310/1190 board communicating with a Launchpad 1310/1190.  I have not been able to get the system to work at 5.0 kbps.

It works fine at 2.5, 50, and 500 kbps.  I have tried the following:

1) Ensured the smartrf_settings.* files in my application match newly-exported files from RF Studio.

2) Connected both of the boards to RF Studio and sent packets between them.  This works fine at 5.0 kbps.

3) Connected our custom board to RF Studio and configured to receive.  Transmit was from the Launchpad 1310/1190 using our custom application. This did not work.  RF Studio

      saw the packets but they all had invalid CRC.

4) TX power does not make a difference

Everything points to an invalid 1310/1190 configuration using our custom applications.  Both the Launchpad and our custom board use almost the exact same code and configuration.

I am running at 915 Mhz using the sync code 0x930b51de.  I am using RF Studio 7-2.9.0.  I am using SDK 2_10_00_36 and running TI RTOS.  Code has been developed using

CCS version 8.1.0.00011.

I have attached a copy of the smartrf_settings.c file I am using.

Fullscreen smartrf_settings_5_0_kbps_1190.c Download 
//*********************************************************************************
// Generated by SmartRF Studio version 2.9.0 (build#85)
// Compatible with SimpleLink SDK version: CC13x0 SDK 2.10.xx.xx
// Device: CC1310 Rev. 2.1 (Rev. B)
// 
//*********************************************************************************


//*********************************************************************************
// Parameter summary
// Address: 0 
// Address0: 0xAA 
// Address1: 0xBB 
// Frequency: 915.00000 MHz
// Data Format: Serial mode disable 
// Deviation: 5.000 kHz
// pktLen: 30 
// 802.15.4g Mode: 0 
// Select bit order to transmit PSDU octets:: 1 
// Packet Length Config: Variable 
// Max Packet Length: 128 
// Packet Length: 20 
// Packet Data: 255 
// RX Filter BW: 49 kHz
// Symbol Rate: 19.99969 kBaud
// Sync Word Length: 32 Bits 
// TX Power: 26 dBm (requires define CCFG_FORCE_VDDR_HH = 0 in ccfg.c, see CC13xx/CC26xx Technical Reference Manual)
// Whitening: No whitening 

#include <ti/devices/DeviceFamily.h>
#include DeviceFamily_constructPath(driverlib/rf_mailbox.h)
#include DeviceFamily_constructPath(driverlib/rf_common_cmd.h)
#include DeviceFamily_constructPath(driverlib/rf_prop_cmd.h)
#include <ti/drivers/rf/RF.h>
#include DeviceFamily_constructPath(rf_patches/rf_patch_cpe_sl_longrange.h)
#include DeviceFamily_constructPath(rf_patches/rf_patch_rfe_sl_longrange.h)
#include DeviceFamily_constructPath(rf_patches/rf_patch_mce_sl_longrange.h)
#include "smartrf_settings_5_0_kbps_1190.h"


// TI-RTOS RF Mode Object
RF_Mode RF_prop =
{
    .rfMode = RF_MODE_PROPRIETARY_SUB_1,
    .cpePatchFxn = &rf_patch_cpe_sl_longrange,
    .mcePatchFxn = &rf_patch_mce_sl_longrange,
    .rfePatchFxn = &rf_patch_rfe_sl_longrange,
};

// TX Power table
// The RF_TxPowerTable_DEFAULT_PA_ENTRY macro is defined in RF.h and requires the following arguments:
// RF_TxPowerTable_DEFAULT_PA_ENTRY(bias, gain, boost coefficient)
// See the Technical Reference Manual for further details about the "txPower" Command field.
// The PA settings require the CCFG_FORCE_VDDR_HH = 0 unless stated otherwise.
RF_TxPowerTable_Entry txPowerTable[] = 
{ 
    {7, RF_TxPowerTable_DEFAULT_PA_ENTRY(0, 3, 0, 0) },
    {14, RF_TxPowerTable_DEFAULT_PA_ENTRY(1, 3, 0, 0) },
    {18, RF_TxPowerTable_DEFAULT_PA_ENTRY(2, 3, 0, 0) },
    {20, RF_TxPowerTable_DEFAULT_PA_ENTRY(3, 3, 0, 0) },
    {22, RF_TxPowerTable_DEFAULT_PA_ENTRY(4, 3, 0, 0) },
    {23, RF_TxPowerTable_DEFAULT_PA_ENTRY(5, 3, 0, 0) },
    {24, RF_TxPowerTable_DEFAULT_PA_ENTRY(6, 3, 0, 0) },
    {25, RF_TxPowerTable_DEFAULT_PA_ENTRY(9, 3, 0, 0) },
    {26, RF_TxPowerTable_DEFAULT_PA_ENTRY(14, 3, 0, 0) },
    RF_TxPowerTable_TERMINATION_ENTRY
};


// Overrides for CMD_PROP_RADIO_DIV_SETUP
uint32_t pOverrides[] =
{
    // override_use_patch_simplelink_long_range.xml
    // PHY: Use MCE RAM patch, RFE RAM patch
    MCE_RFE_OVERRIDE(1,0,0,1,0,0),
    // override_synth_prop_863_930_div5_lbw60k.xml
    // Synth: Set recommended RTRIM to 7
    HW_REG_OVERRIDE(0x4038,0x0037),
    // Synth: Set Fref to 4 MHz
    (uint32_t)0x000684A3,
    // Synth: Configure fine calibration setting
    HW_REG_OVERRIDE(0x4020,0x7F00),
    // Synth: Configure fine calibration setting
    HW_REG_OVERRIDE(0x4064,0x0040),
    // Synth: Configure fine calibration setting
    (uint32_t)0xB1070503,
    // Synth: Configure fine calibration setting
    (uint32_t)0x05330523,
    // Synth: Set loop bandwidth after lock to 60 kHz
    (uint32_t)0x40410583,
    // Synth: Set loop bandwidth after lock to 60 kHz
    (uint32_t)0x32CC0603,
    // Synth: Set loop bandwidth after lock to 60 kHz
    (uint32_t)0x00010623,
    // Synth: Configure VCO LDO (in ADI1, set VCOLDOCFG=0x9F to use voltage input reference)
    ADI_REG_OVERRIDE(1,4,0x9F),
    // Synth: Configure synth LDO (in ADI1, set SLDOCTL0.COMP_CAP=1)
    ADI_HALFREG_OVERRIDE(1,7,0x4,0x4),
    // Synth: Use 24 MHz XOSC as synth clock, enable extra PLL filtering
    (uint32_t)0x02010403,
    // Synth: Configure extra PLL filtering
    (uint32_t)0x00108463,
    // Synth: Increase synth programming timeout (0x04B0 RAT ticks = 300 us)
    (uint32_t)0x04B00243,
    // override_synth_disable_bias_div5.xml
    // Synth: Set divider bias to disabled
    HW32_ARRAY_OVERRIDE(0x405C,1),
    // Synth: Set divider bias to disabled (specific for loDivider=5)
    (uint32_t)0x18000200,
    // override_phy_rx_aaf_bw_0xd.xml
    // Rx: Set anti-aliasing filter bandwidth to 0xD (in ADI0, set IFAMPCTL3[7:4]=0xD)
    ADI_HALFREG_OVERRIDE(0,61,0xF,0xD),
    // override_phy_gfsk_rx.xml
    // Rx: Set LNA bias current trim offset to 3
    (uint32_t)0x00038883,
    // Rx: Freeze RSSI on sync found event
    HW_REG_OVERRIDE(0x6084,0x35F1),
    // override_phy_gfsk_pa_ramp_agc_reflevel_0x14.xml
    // Tx: Configure PA ramping setting (0x41). Rx: Set AGC reference level to 0x14.
    HW_REG_OVERRIDE(0x6088,0x4114),
    // Tx: Configure PA ramping setting
    HW_REG_OVERRIDE(0x608C,0x8213),
    // override_phy_long_range_dsss2.xml
    // PHY: Configure DSSS SF=2
    HW_REG_OVERRIDE(0x505C,0x0100),
    // override_phy_rx_rssi_offset_cc1310_cc1190_9092.xml
    // Rx: Set RSSI offset to adjust reported RSSI by +26 dB
    (uint32_t)0x000388A3,
    (uint32_t)0xFFFFFFFF,
};


// CMD_PROP_RADIO_DIV_SETUP
// Proprietary Mode Radio Setup Command for All Frequency Bands
rfc_CMD_PROP_RADIO_DIV_SETUP_t RF_cmdPropRadioDivSetup =
{
    .commandNo = 0x3807,
    .status = 0x0000,
    .pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx
    .startTime = 0x00000000,
    .startTrigger.triggerType = 0x0,
    .startTrigger.bEnaCmd = 0x0,
    .startTrigger.triggerNo = 0x0,
    .startTrigger.pastTrig = 0x0,
    .condition.rule = 0x1,
    .condition.nSkip = 0x0,
    .modulation.modType = 0x1,
    .modulation.deviation = 0x14,
    .symbolRate.preScale = 0xF,
    .symbolRate.rateWord = 0x3333,
    .rxBw = 0x21,
    .preamConf.nPreamBytes = 0x2,
    .preamConf.preamMode = 0x0,
    .formatConf.nSwBits = 0x20,
    .formatConf.bBitReversal = 0x0,
    .formatConf.bMsbFirst = 0x0,
    .formatConf.fecMode = 0x8,
    .formatConf.whitenMode = 0x0,
    .config.frontEndMode = 0x0,
    .config.biasMode = 0x1,
    .config.analogCfgMode = 0x0,
    .config.bNoFsPowerUp = 0x0,
    .txPower = 0x00CE,
    .pRegOverride = pOverrides,
    .centerFreq = 0x0393,
    .intFreq = 0x8000,
    .loDivider = 0x05,
};

// CMD_FS
// Frequency Synthesizer Programming Command
rfc_CMD_FS_t RF_cmdFs =
{
    .commandNo = 0x0803,
    .status = 0x0000,
    .pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx
    .startTime = 0x00000000,
    .startTrigger.triggerType = 0x0,
    .startTrigger.bEnaCmd = 0x0,
    .startTrigger.triggerNo = 0x0,
    .startTrigger.pastTrig = 0x0,
    .condition.rule = 0x1,
    .condition.nSkip = 0x0,
    .frequency = 0x0393,
    .fractFreq = 0x0000,
    .synthConf.bTxMode = 0x0,
    .synthConf.refFreq = 0x0,
    .__dummy0 = 0x00,
    .__dummy1 = 0x00,
    .__dummy2 = 0x00,
    .__dummy3 = 0x0000,
};

// CMD_PROP_RX
// Proprietary Mode Receive Command
rfc_CMD_PROP_RX_t RF_cmdPropRx =
{
    .commandNo = 0x3802,
    .status = 0x0000,
    .pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx
    .startTime = 0x00000000,
    .startTrigger.triggerType = 0x0,
    .startTrigger.bEnaCmd = 0x0,
    .startTrigger.triggerNo = 0x0,
    .startTrigger.pastTrig = 0x0,
    .condition.rule = 0x1,
    .condition.nSkip = 0x0,
    .pktConf.bFsOff = 0x0,
    .pktConf.bRepeatOk = 0x0,
    .pktConf.bRepeatNok = 0x0,
    .pktConf.bUseCrc = 0x1,
    .pktConf.bVarLen = 0x1,
    .pktConf.bChkAddress = 0x0,
    .pktConf.endType = 0x0,
    .pktConf.filterOp = 0x0,
    .rxConf.bAutoFlushIgnored = 0x0,
    .rxConf.bAutoFlushCrcErr = 0x0,
    .rxConf.bIncludeHdr = 0x1,
    .rxConf.bIncludeCrc = 0x0,
    .rxConf.bAppendRssi = 0x0,
    .rxConf.bAppendTimestamp = 0x0,
    .rxConf.bAppendStatus = 0x1,
    .syncWord = 0x930B51DE,
    .maxPktLen = 0x80,
    .address0 = 0xAA,
    .address1 = 0xBB,
    .endTrigger.triggerType = 0x1,
    .endTrigger.bEnaCmd = 0x0,
    .endTrigger.triggerNo = 0x0,
    .endTrigger.pastTrig = 0x0,
    .endTime = 0x00000000,
    .pQueue = 0, // INSERT APPLICABLE POINTER: (dataQueue_t*)&xxx
    .pOutput = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx
};

// CMD_PROP_TX
// Proprietary Mode Transmit Command
rfc_CMD_PROP_TX_t RF_cmdPropTx =
{
    .commandNo = 0x3801,
    .status = 0x0000,
    .pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx
    .startTime = 0x00000000,
    .startTrigger.triggerType = 0x0,
    .startTrigger.bEnaCmd = 0x0,
    .startTrigger.triggerNo = 0x0,
    .startTrigger.pastTrig = 0x0,
    .condition.rule = 0x1,
    .condition.nSkip = 0x0,
    .pktConf.bFsOff = 0x0,
    .pktConf.bUseCrc = 0x1,
    .pktConf.bVarLen = 0x1,
    .pktLen = 0x14,
    .syncWord = 0x930B51DE,
    .pPkt = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx
};

Any help on what to look at to figure out this issue would be greatly appreciated!

Victor

  • 0
    TI__Mastermind 36395 points
    Victor,

    I think it has something to do with frequency error between the TX and RX node, as you go lower in data rates you also decrease your RX bandwidth. I see your example that you are using 44kHz RXBW. This will require that your transmitter and receiver is within 5kHz of each other. Please verify the frequency error by using a spectrum analyzer.

    Regards,
    /TA
  • 0 in reply to TA12012
    Expert 1070 points
    Hi TA,

    Thanks for your response. Could you explain how we could have a frequency error if both boards
    are using the 1310/1190 combination with the exact same config? Also, it works at 2.5 kbps so I'm
    wondering if the low data-rate frequency mismatch may not be the problem.

    Victor
  • 0 in reply to VICTOR VALENCIA
    TI__Guru**** 317180 points

    Is the 5.0 kHz setting long range mode settings from Studio?

  • 0 in reply to VICTOR VALENCIA
    Expert 1070 points
    I have not applied any patches to the configuration. It is taken directly from RF studio. I also confirmed by comparing
    the smartrf_settings.c data structures at the time of the TX command is that the only difference between the 2.5 kbps
    configuration (which works) and the 5.0 kbps is the Spread Factor parameter.
  • 0 in reply to VICTOR VALENCIA
    TI__Mastermind 36395 points
    Victor,

    I am talking about HW differences, if you do the math on 1kHz offset at 900MHz, that is approximately 1ppm. It is very common for newly designed boards to have a frequency error of 10-20ppm and therefore these narrow band operations will not work as expected.

    Regards,
    /TA
  • 0 in reply to TA12012
    Expert 1070 points
    Our board uses the TI reference circuit design. I think it's important to note that when RF Studio is connected to our
    board it works fine at 5 kbps. This leads me to believe that there is some radio configuration performed by RF Studio
    that is not exported. We have a power-sensitive application and we're hoping to use 5 kbps since the xmit time is
    1/2 of what it is for 2.5 kbps which means less power. Saving power is more important to us than the additional
    1 db of performance you gain by using 2.5 kbps.

    Victor
  • 0 in reply to VICTOR VALENCIA
    TI__Mastermind 36395 points
    Ok, I see.

    The big difference between SmartRF Studio and full CCS development is that SmartRF Studio does not attempt to use power management and scheduling events out in the future.

    Have you validated that basic items on your board is working, the one I am thinking about the most is the 32KHz XTAL.

    Regards,
    /TA
  • 0 in reply to TA12012
    Expert 1070 points

    Understood.  Can we not imply that the 32Khz crystal is working since RF Studio can make the board work at 2.5 kbps?

    Victor

  • 0 in reply to VICTOR VALENCIA
    TI__Mastermind 36395 points
    Agree with you that if it works at 2.5Kbps, it should work at 5.0kbps.

    The only difference between the two settings is the DSSS level, this is configured in the override section of the SmartRF.c file.


    5kbps is defined as this:

    // override_phy_long_range_dsss2.xml
    // PHY: Configure DSSS SF=2
    HW_REG_OVERRIDE(0x505C,0x0100),

    2.5kbps is defined as this.

    // override_phy_long_range_dsss4.xml
    // PHY: Configure DSSS SF=4
    HW_REG_OVERRIDE(0x505C,0x0303),

    Can you take your one project that does work and just modify this one setting in both TX and RX and you should be able to modify from 5kbps to 2.5 and back again.

    Regards,
    /TA