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SENSITIVITY IN SIMPLE LONG RANGE MODE

Part Number: CC1350


Hi all,

I have exported simple long range mode RF settings. In that i kept input symbol rate as 9.6 kbps, Rx banwidth as 155 KHz and deviation as 4.75 KHz. Here spreading factor i kept 4. So when i measured the transmitted burst duration i am getting 8 time of burst duration of without spraeding (here i kept 9.6 Kbps, 39 KHz, 4.75 KHz , GFSK RF settings). It is correct.

Q.1. But when i am going to measure the sensitivity i am not getting any imrovement. settings with SPREADING should have better sensitivity. What mistake might be in setting? Here one confusion i have, the symbol rate we are giving in smart rf setting, is it over the air  rate. suppose if my data rate is 9.6 kbps (which is equal to symbol rate in case of GFSK), then in symbol rate i should keep 9.6 *8 (if my spraeding factor is 4, 2 for 1/2 rate encoder).My  requirement is i have sent data in GFSK with the rate of 9.6 kbps , 39 khz bw and 4.75 khz deviation .now i want to apply spreading of 4 . what should be my symbol rate, rxbw, deviation.

Q.2 In following link it is mentioned that, maximum symbol rate 40 ksps. what does it mean by LRM and maximum symbol rate?

                  https://e2e.ti.com/support/wireless-connectivity/sub-1-ghz/f/156/p/538151/1962428#1962428

         Q.3. will DSSS will work with any mode or it is valid with SLRM MODE?

Thanks

  • The relationship between data rate (i.e. the actual amount of information bits available to the higher protocol layers) and the symbol rate (i.e. the actual modulation rate used in the radio) can be expressed as:

    Data Rate = Symbol Rate / (2*DSSS)

    Example, if you use 9.6 ksps and spreading factor of 4 the data rate will be 9.6k/8 = 1.2 kbps. The signal BW is determined by the symbol rate and deviation and 39 kHz BW is perfectly alright. No need to use 155 kHz RX filter BW. The larger BW will degrade the sensitivity by 10log(155/39) dB compared to using 39 kHz.

    If you keep the symbol rate, deviation and RX filter BW constant you will find that the sensitivity improves with higher spreading factor.

    If you want the same data rate with and without spreading you need to change three things when you use spreading: 1) increase the symbol rate due to DSSS being 2, 4, or 8, 2) increase the deviation to keep the modulation index the same, and 3) increase the RX filter BW to account for the larger signal BW when symbol rate and deviation increases.

    In question Q.1) it seems like you want a 9.6 kbps data rate using a spreading factor of 4. The symbol rate then needs to be as 76.8 ksps with a deviation of 38.4 kHz. In this case a RX filter BW of 155 kHz makes sense. The increased RX filter BW will degrade the sensitivity and the spreading will improve it so I am not surprised there is no benefit in using spreading over 9.6 kbps, GFSK without spreading.

    Q.2) The maximum is 100 ksps for LRM

    Q.3) DSSS works in two modes: LRM and wide-band DSSS (WB-DSSS). The latter allows much higher symbol rates than LRM., Data for 480 ksps is in the CC13x0 data sheet
  • Hi sverre,

    Thanks a lot for valuable insight.

    Referring to your line,

    "The increased RX filter BW will degrade the sensitivity and the spreading will improve it so I am not surprised there is no benefit in using spreading over 9.6 kbps, GFSK without spreading".   Same thing is going in my mind also.

    Actually my target is to show that with DSSS sensitivity is getting improved.

    So Q.1.)So without DSSS i.e for GFSK IF I keep symbol rate 9.6 kbps, 39 Khz (BW)and 4.75 khz (deviation) . Then for proving the theoretical concept (improvement in sensitivity)of DSSS i should keep symbol rate 9.6 kbps.,39 Khz (BW)and 4.75 khz (deviation)...only . With same RX BW....Am i correct?

    Q.2) Somewhere i read, modulation index should be 1, ...is there any specific reason behind this?

    Q.3) I smart rf setting of Simple link long range mode, lsb is being transmitted first while in GFSK msb is transmitted first..Why??

    Q4.)Syncword is also different ...in GFSK ..0X91035DE while in SL LRM IT IS...0X00000000......ANY SPECIFIC REASON of keeping this??

  • First of all, higher DSSS rates offer higher sensitivity gains. This, of course, comes at the expense of longer packet duration. Secondly, when comparing BER=10-3 and BER=10-5 values, we can state that the gain is larger for the BER=10-5 reference points. The reason for this is the fact that when using coded modulations, the BER curves are more abrupt (converge quicker towards zero BER values). This is a well-known effect of convolutional coding or coding in general. (The choice of reference point is given by the application and higher level protocols. A protocol that normally uses short packets (20 to 60 bytes) would have an acceptable PER when the BER is 10-3. On the other hand, a protocol that normally uses long packets (200 to 2000 bytes) would need at least a BER of 10-5 to properly operate. )

    Q1) You are correct, but please note that the data rate (throughput) goes down with higher DSSS. Note that DSSS = 1 is not supported for SimpleLink LRM.

    Q2) A modulation index of 1 or 0.5 is simply a good compromise. Lower modulation index (i.e.2 x deviation / symbol rate) gives smaller TX spectrum and a lower RX filter BW can be used. Theoretically, there is an optimum 2xdeviation/datarate setting if you simultaneously minimize the receiver filter bandwidth. Every halving of receiver filter bandwidth increases sensitivity with 3 dB whereas sensitivity vs 2xdeviation/datarate decreases with about 1.5-2.5 dB per halving down to a certain limit where the loss increases very fast. In our experience a modulation index = 1 or 0.5 is a good design compromise.

    Q3) Sorry, don't know the answer to this one.

    Q4) SimpleLink LRM uses no preamble. Instead, it uses a 64-bit sync word (SW) that is repeated M+1 times. The first M times, the inverted SW is sent. The final repetition is as specified. The SW in SimpleLink LRM is HW coded (0xCCC3_C3CC_C33C_3333, LSB first) and cannot be modified by users. The number of repetitions (M) is configured through the .preamConf.nPreamBytes variable of CMD_PROP_RADIO_DIV_SETUP. The default value is 2. The SimpleLink LRM sync word is needed to get good frequency offset performance.
  • Did a check on Q3). The design was done for LSB first, but could equally well have been designed for MSB first. That said, the design is now fixed on LSB first.
  • //*********************************************************************************
    // Generated by SmartRF Studio version 2.7.0 (build #23)
    // Tested for SimpleLink SDK version: CC13x0 SDK 1.30.xx.xx
    // Device: CC1350 Rev. 2.1
    //
    //*********************************************************************************
    
    
    //*********************************************************************************
    // Parameter summary
    // Address: off
    // Address0: 0xAA 
    // Address1: 0xBB 
    // Frequency: 433.92000 MHz
    // Data Format: Serial mode disable 
    // Deviation: 5.000 kHz
    // Packet Length Config: Variable 
    // Max Packet Length: 255
    // Packet Length: 20 
    // RX Filter BW: 49 kHz
    // Symbol Rate: 19.99969 kBaud
    // Sync Word Length: 32 Bits 
    // TX Power: 15 dBm (requires define CCFG_FORCE_VDDR_HH = 1 in ccfg.c, see CC13xx/CC26xx Technical Reference Manual)
    // Whitening: No whitening 
    
    
    #include <ti/devices/DeviceFamily.h>
    #include DeviceFamily_constructPath(driverlib/rf_mailbox.h)
    #include DeviceFamily_constructPath(driverlib/rf_common_cmd.h)
    #include DeviceFamily_constructPath(driverlib/rf_prop_cmd.h)
    #include <ti/drivers/rf/RF.h>
    
    // Patches for simpple link long range mode
    #include DeviceFamily_constructPath(rf_patches/rf_patch_cpe_sl_longrange.h)
    #include DeviceFamily_constructPath(rf_patches/rf_patch_rfe_sl_longrange.h)
    #include DeviceFamily_constructPath(rf_patches/rf_patch_mce_sl_longrange.h)
    
    //Patches for GFSK mode
    #include DeviceFamily_constructPath(rf_patches/rf_patch_cpe_genfsk.h)
    #include DeviceFamily_constructPath(rf_patches/rf_patch_rfe_genfsk.h)
    
    #include "smartrf_settings.h"
    
    
    // TI-RTOS RF Mode Object
    RF_Mode RF_prop_Dsss =
    {
        .rfMode = RF_MODE_PROPRIETARY_SUB_1,
        .cpePatchFxn = &rf_patch_cpe_sl_longrange,
        .mcePatchFxn = &rf_patch_mce_sl_longrange,
        .rfePatchFxn = &rf_patch_rfe_sl_longrange,
    };
    
    RF_Mode RF_prop_NoDsss =
    {
    	.rfMode = RF_MODE_PROPRIETARY_SUB_1,
    	.cpePatchFxn = &rf_patch_cpe_genfsk,
    	.mcePatchFxn = 0,
    	.rfePatchFxn = &rf_patch_rfe_genfsk,
    };
    
    // Overrides for CMD_PROP_RADIO_DIV_SETUP
    static uint32_t pOverrides_Dsss[] =
    {
        // override_use_patch_simplelink_long_range.xml
        // PHY: Use MCE RAM patch, RFE RAM patch
        MCE_RFE_OVERRIDE(1,0,0,1,0,0),
        // override_synth_prop_430_510_div10_lbw60k.xml
        // Synth: Set recommended RTRIM to 7
        HW_REG_OVERRIDE(0x4038,0x0037),
        // Synth: Set Fref to 4 MHz
        (uint32_t)0x000684A3,
        // Synth: Configure fine calibration setting
        HW_REG_OVERRIDE(0x4020,0x7F00),
        // Synth: Configure fine calibration setting
        HW_REG_OVERRIDE(0x4064,0x0040),
        // Synth: Configure fine calibration setting
        (uint32_t)0xB1070503,
        // Synth: Configure fine calibration setting
        (uint32_t)0x05330523,
        // Synth: Set loop bandwidth after lock to 60 kHz
        (uint32_t)0x40410583,
        // Synth: Set loop bandwidth after lock to 60 kHz
        (uint32_t)0x32CC0603,
        // Synth: Set loop bandwidth after lock to 60 kHz
        (uint32_t)0x00010623,
        // Synth: Configure VCO LDO (in ADI1, set VCOLDOCFG=0x9F to use voltage input reference)
        ADI_REG_OVERRIDE(1,4,0x9F),
        // Synth: Configure synth LDO (in ADI1, set SLDOCTL0.COMP_CAP=1)
        ADI_HALFREG_OVERRIDE(1,7,0x4,0x4),
        // Synth: Use 24 MHz XOSC as synth clock, enable extra PLL filtering
        (uint32_t)0x02010403,
        // Synth: Configure extra PLL filtering
        (uint32_t)0x00108463,
        // Synth: Increase synth programming timeout (0x04B0 RAT ticks = 300 us)
        (uint32_t)0x04B00243,
        // override_synth_disable_bias_div10.xml
        // Synth: Set divider bias to disabled
        HW32_ARRAY_OVERRIDE(0x405C,1),
        // Synth: Set divider bias to disabled (specific for loDivider=10)
        (uint32_t)0x18000280,
        // override_phy_rx_aaf_bw_0xd.xml
        // Rx: Set anti-aliasing filter bandwidth to 0xD (in ADI0, set IFAMPCTL3[7:4]=0xD)
        ADI_HALFREG_OVERRIDE(0,61,0xF,0xD),
        // override_phy_gfsk_rx.xml
        // Rx: Set LNA bias current trim offset to 3
        (uint32_t)0x00038883,
        // Rx: Freeze RSSI on sync found event
        HW_REG_OVERRIDE(0x6084,0x35F1),
        // override_phy_gfsk_pa_ramp_agc_reflevel_0x16.xml
        // Tx: Configure PA ramping setting (0x41). Rx: Set AGC reference level to 0x16.
        HW_REG_OVERRIDE(0x6088,0x4116),
        // Tx: Configure PA ramping setting
        HW_REG_OVERRIDE(0x608C,0x8213),
        // override_phy_long_range_dsss2.xml
        // PHY: Configure DSSS SF=4
        //HW_REG_OVERRIDE(0x505C,0x073C),   // changed for 8
    	HW_REG_OVERRIDE(0x505C,0x0303),
        // override_phy_rx_rssi_offset_neg2db.xml
        // Rx: Set RSSI offset to adjust reported RSSI by -2 dB
        (uint32_t)0x000288A3,
    //    #if (CCFG_FORCE_VDDR_HH)  //This line i added ...its not part of normal mode
        // TX power override
        // Tx: Set PA trim to max (in ADI0, set PACTL0=0xF8)
        ADI_REG_OVERRIDE(0,12,0xF8),
    //    #endif
        (uint32_t)0xFFFFFFFF,
    };
    
    // Overrides for CMD_PROP_RADIO_DIV_SETUP
    static uint32_t pOverrides_NoDsss[] =
    {
        // override_use_patch_prop_genfsk.xml
        // PHY: Use MCE ROM bank 4, RFE RAM patch
        MCE_RFE_OVERRIDE(0,4,0,1,0,0),
        // override_synth_prop_430_510_div10.xml
        // Synth: Set recommended RTRIM to 7
        HW_REG_OVERRIDE(0x4038,0x0037),
        // Synth: Set Fref to 4 MHz
        (uint32_t)0x000684A3,
        // Synth: Configure fine calibration setting
        HW_REG_OVERRIDE(0x4020,0x7F00),
        // Synth: Configure fine calibration setting
        HW_REG_OVERRIDE(0x4064,0x0040),
        // Synth: Configure fine calibration setting
        (uint32_t)0xB1070503,
        // Synth: Configure fine calibration setting
        (uint32_t)0x05330523,
        // Synth: Set loop bandwidth after lock to 20 kHz
        (uint32_t)0x0A480583,
        // Synth: Set loop bandwidth after lock to 20 kHz
        (uint32_t)0x7AB80603,
        // Synth: Configure VCO LDO (in ADI1, set VCOLDOCFG=0x9F to use voltage input reference)
        ADI_REG_OVERRIDE(1,4,0x9F),
        // Synth: Configure synth LDO (in ADI1, set SLDOCTL0.COMP_CAP=1)
        ADI_HALFREG_OVERRIDE(1,7,0x4,0x4),
        // Synth: Use 24 MHz XOSC as synth clock, enable extra PLL filtering
        (uint32_t)0x02010403,
        // Synth: Configure extra PLL filtering
        (uint32_t)0x00108463,
        // Synth: Increase synth programming timeout (0x04B0 RAT ticks = 300 us)
        (uint32_t)0x04B00243,
        // override_synth_disable_bias_div10.xml
        // Synth: Set divider bias to disabled
        HW32_ARRAY_OVERRIDE(0x405C,1),
        // Synth: Set divider bias to disabled (specific for loDivider=10)
        (uint32_t)0x18000280,
        // override_phy_rx_aaf_bw_0xd.xml
        // Rx: Set anti-aliasing filter bandwidth to 0xD (in ADI0, set IFAMPCTL3[7:4]=0xD)
        ADI_HALFREG_OVERRIDE(0,61,0xF,0xD),
        // override_phy_gfsk_rx.xml
        // Rx: Set LNA bias current trim offset to 3
        (uint32_t)0x00038883,
        // Rx: Freeze RSSI on sync found event
        HW_REG_OVERRIDE(0x6084,0x35F1),
        // override_phy_gfsk_pa_ramp_agc_reflevel_0x1a.xml
        // Tx: Configure PA ramping setting (0x41). Rx: Set AGC reference level to 0x1A.
        HW_REG_OVERRIDE(0x6088,0x411A),
        // Tx: Configure PA ramping setting
        HW_REG_OVERRIDE(0x608C,0x8213),
        // override_phy_rx_rssi_offset_neg2db.xml
        // Rx: Set RSSI offset to adjust reported RSSI by -2 dB
        (uint32_t)0x000288A3,
     //   #if (CCFG_FORCE_VDDR_HH)
        // TX power override
        // Tx: Set PA trim to max (in ADI0, set PACTL0=0xF8)
        ADI_REG_OVERRIDE(0,12,0xF8),
     //   #endif
        (uint32_t)0xFFFFFFFF,
    };
    
    
    // CMD_PROP_RADIO_DIV_SETUP for dsss mode
    // Proprietary Mode Radio Setup Command for All Frequency Bands
    rfc_CMD_PROP_RADIO_DIV_SETUP_t RF_cmdPropRadioDivSetup_Dsss =
    {
        .commandNo = 0x3807,
        .status = 0x0000,
        .pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx
        .startTime = 0x00000000,
        .startTrigger.triggerType = 0x0,
        .startTrigger.bEnaCmd = 0x0,
        .startTrigger.triggerNo = 0x0,
        .startTrigger.pastTrig = 0x0,
        .condition.rule = 0x1,
        .condition.nSkip = 0x0,
        .modulation.modType = 0x1,
        .modulation.deviation = 0x64,
        .symbolRate.preScale = 0xF,
        .symbolRate.rateWord = 0x8000,
        .rxBw = 0x24,
        .preamConf.nPreamBytes = 0x2,
        .preamConf.preamMode = 0x0,
        .formatConf.nSwBits = 0x20,
        .formatConf.bBitReversal = 0x0,
        .formatConf.bMsbFirst = 0x0,
    	//.formatConf.bMsbFirst = 0x1,
        .formatConf.fecMode = 0x8,
        .formatConf.whitenMode = 0x0,
        .config.frontEndMode = 0x0,
        .config.biasMode = 0x1,
        .config.analogCfgMode = 0x0,
        .config.bNoFsPowerUp = 0x0,
        .txPower = 0x913F,
        .pRegOverride = pOverrides_Dsss,
        .centerFreq = 0x01B1,
        .intFreq = 0x8000,
        .loDivider = 0x0A,
    };
    
    // CMD_PROP_RADIO_DIV_SETUP for no dsss mode
    // Proprietary Mode Radio Setup Command for All Frequency Bands
    rfc_CMD_PROP_RADIO_DIV_SETUP_t RF_cmdPropRadioDivSetup_NoDsss =
    {
        .commandNo = 0x3807,
        .status = 0x0000,
        .pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx
        .startTime = 0x00000000,
        .startTrigger.triggerType = 0x0,
        .startTrigger.bEnaCmd = 0x0,
        .startTrigger.triggerNo = 0x0,
        .startTrigger.pastTrig = 0x0,
        .condition.rule = 0x1,
        .condition.nSkip = 0x0,
        .modulation.modType = 0x1,
        .modulation.deviation = 0x64,
        .symbolRate.preScale = 0xF,
        .symbolRate.rateWord = 0x8000,
        .rxBw = 0x24,
        .preamConf.nPreamBytes = 0x4,
        .preamConf.preamMode = 0x0,
        .formatConf.nSwBits = 0x20,
        .formatConf.bBitReversal = 0x0,
        .formatConf.bMsbFirst = 0x1,
        .formatConf.fecMode = 0x0,
        .formatConf.whitenMode = 0x0,
        .config.frontEndMode = 0x0,
        .config.biasMode = 0x1,
        .config.analogCfgMode = 0x0,
        .config.bNoFsPowerUp = 0x0,
        .txPower = 0x913F,
        .pRegOverride = pOverrides_NoDsss,
        .centerFreq = 0x01B1,
        .intFreq = 0x8000,
        .loDivider = 0x0A,
    };
    
    // CMD_FS
    // Frequency Synthesizer Programming Command
    rfc_CMD_FS_t RF_cmdFs =
    {
        .commandNo = 0x0803,
        .status = 0x0000,
        .pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx
        .startTime = 0x00000000,
        .startTrigger.triggerType = 0x0,
        .startTrigger.bEnaCmd = 0x0,
        .startTrigger.triggerNo = 0x0,
        .startTrigger.pastTrig = 0x0,
        .condition.rule = 0x1,
        .condition.nSkip = 0x0,
        .frequency = 0x01B1,
        .fractFreq = 0xEB85,
        .synthConf.bTxMode = 0x0,
        .synthConf.refFreq = 0x0,
        .__dummy0 = 0x00,
        .__dummy1 = 0x00,
        .__dummy2 = 0x00,
        .__dummy3 = 0x0000,
    };
    
    // CMD_PROP_TX
    // Proprietary Mode Transmit Command
    rfc_CMD_PROP_TX_t RF_cmdPropTx =
    {
        .commandNo = 0x3801,
        .status = 0x0000,
        .pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx
        .startTime = 0x00000000,
        .startTrigger.triggerType = 0x0,
        .startTrigger.bEnaCmd = 0x0,
        .startTrigger.triggerNo = 0x0,
        .startTrigger.pastTrig = 0x0,
        .condition.rule = 0x1,
        .condition.nSkip = 0x0,
        .pktConf.bFsOff = 0x0,
        .pktConf.bUseCrc = 0x1,
        .pktConf.bVarLen = 0x1,
        .pktLen = 0x14, // SET APPLICATION PAYLOAD LENGTH
       // .syncWord = 0x00000000,
    	.syncWord = 0x930B51DE,
        .pPkt = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx
    };
    
    // CMD_PROP_RX
    // Proprietary Mode Receive Command
    rfc_CMD_PROP_RX_t RF_cmdPropRx =
    {
        .commandNo = 0x3802,
        .status = 0x0000,
        .pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx
        .startTime = 0x00000000,
        .startTrigger.triggerType = 0x0,
        .startTrigger.bEnaCmd = 0x0,
        .startTrigger.triggerNo = 0x0,
        .startTrigger.pastTrig = 0x0,
        .condition.rule = 0x1,
        .condition.nSkip = 0x0,
        .pktConf.bFsOff = 0x0,
        .pktConf.bRepeatOk = 0x0,
        .pktConf.bRepeatNok = 0x0,
        .pktConf.bUseCrc = 0x1,
        .pktConf.bVarLen = 0x1,
        .pktConf.bChkAddress = 0x0,
        .pktConf.endType = 0x0,
        .pktConf.filterOp = 0x0,
        .rxConf.bAutoFlushIgnored = 0x0,
        .rxConf.bAutoFlushCrcErr = 0x0,
        .rxConf.bIncludeHdr = 0x1,
        .rxConf.bIncludeCrc = 0x0,
        .rxConf.bAppendRssi = 0x0,
        .rxConf.bAppendTimestamp = 0x0,
        .rxConf.bAppendStatus = 0x1,
       // .syncWord = 0x00000000,
    	.syncWord = 0x930B51DE,
        .maxPktLen = 0x80, // MAKE SURE DATA ENTRY IS LARGE ENOUGH
        .address0 = 0xAA,
        .address1 = 0xBB,
        .endTrigger.triggerType = 0x1,
        .endTrigger.bEnaCmd = 0x0,
        .endTrigger.triggerNo = 0x0,
        .endTrigger.pastTrig = 0x0,
        .endTime = 0x00000000,
        .pQueue = 0, // INSERT APPLICABLE POINTER: (dataQueue_t*)&xxx
        .pOutput = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx
    };
    
    
    
    // CMD_TX_TEST
    // Transmitter Test Command
    rfc_CMD_TX_TEST_t RF_cmdTxTest =
    {
        .commandNo = 0x0808,
        .status = 0x0000,
        .pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx
        .startTime = 0x00000000,
        .startTrigger.triggerType = 0x0,
        .startTrigger.bEnaCmd = 0x0,
        .startTrigger.triggerNo = 0x0,
        .startTrigger.pastTrig = 0x0,
        .condition.rule = 0x1,
        .condition.nSkip = 0x0,
       // .config.bUseCw = 0x0,
    	 .config.bUseCw = 0x1,
        .config.bFsOff = 0x1,
        .config.whitenMode = 0x2,
        .__dummy0 = 0x00,
       // .txWord = 0xABCD,
    	.txWord = 0xFFFF,
        .__dummy1 = 0x00,
        .endTrigger.triggerType = 0x1,
        .endTrigger.bEnaCmd = 0x0,
        .endTrigger.triggerNo = 0x0,
        .endTrigger.pastTrig = 0x0,
        .syncWord = 0x930B51DE,
        .endTime = 0x00000000,
    };
    Hi sverre,

    Thanks for valuable input. I am still struggling to get sensitivity improvement. Please help.

    1.  I kept symbol rate 9.6 kbps, 39 Khz (BW)and 4.75 khz (deviation) .....in both case i.e GFSK and LRM_MODE. number of preamble i kept 4 in both cases. Spreading factor i am keeping 4. Both places i am transmitting MSB first. Modulation index i kept 1. But i am not getting improvement.  I am attaching my RF settings file also.

    2. " Lower modulation index (i.e.2 x deviation / symbol rate) gives smaller TX spectrum and a lower RX filter BW can be used. Theoretically, there is an optimum 2xdeviation/datarate setting if you simultaneously minimize the receiver filter bandwidth".  RxBw is being affected by symbol rate but you used data rate. Why?

    3. "The design was done for LSB first, but could equally well have been designed for MSB first. That said, the design is now fixed on LSB first".  Please elaborate this little bit more.

    4. "The SW in SimpleLink LRM is HW coded (0xCCC3_C3CC_C33C_3333, LSB first) and cannot be modified by users". Please elaborate this little bit more.

    Thanks.

  • 1. The settings look ok.- No idea how you do your testing, but ideally you should do conducted testing with an RF signal generator as input source to check on the sensitivity.

    2. Typo. The correct should be "symbol rate".

    3. Don't have more details on this. Sorry.

    4. Due to binary coding, the demodulator actually operates in very low SNR conditions (the higher the DSSS value, the lower minimum SNR at the demodulator). Synchronization to the packet must also occur at very low SNR levels. The initial symbol sequence in front of the packet is needed to enable proper synchronization. The repetition of multiple SyncWords prior to the final one allows the demodulator to run a very effective frequency offset tracking algorithm.
  • Hi Sverre,

    Thanks for your valuable time and inputs. Now i am able to see the effect of DSSS.