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CC1125: Using the CC1125 GPIO pins to control an external PA

IanBristol
Intellectual 615 points
Part Number: CC1125


HI,

When using one of the GPIO pins to control an externa; front end (PA and LNA), can you guarantee that the PA_ON (GPIO codes 23 or 25) will not be de-asserted before the final byte (usuallty the added CRC) has been completely flushed from the CC1125?  Or should I add some delay to this signal to ensure that the PA remains on for a short while after this pin is de-asserted, and if som what should this delay be?

Thanks,

Ian

  • 0
    TI__Guru**** 317180 points
    The signals used as LNA_PD and PA_PD on a GPIO is also directly connected to the internal LNA and PA. This means that when these signals go high/ low the internal LAN/ PA is also turned off/ on. This means that adding extra delay on these signals will not give any benefit. If PA ramping is selected an extra symbol is inserted at the start and the end of the packet meaning that some delay is already in place after the sync word.