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CC1312R: Technical questions regarding CC1312

Part Number: CC1312R
Other Parts Discussed in Thread: TIDA-010024,

Hello,

I have few questions please:

  • Can you please give me more data regarding the crystals to choose, 48Mhz requirements, and also 32.768kHz
  • Can you please send the BOM for your EVB that match to schematic, because in the “ TIDA-010024 Bill of Materials “ isn’t appears crystals.
  • If I want to use the external SPI Flash as slave device, and also I need to connect the SOM as Master to TI CC1312 via SPI interface, what pins you suggest to use as Master?  (is it DIO8/9/10/11 ?)
  • What are the characteristics for External SPI flash to choice?

  • - This is listed in the datasheet. You can also find some information in http://www.ti.com/lit/an/swra495f/swra495f.pdf

    - Go down to "Design files" here: http://www.ti.com/product/CC1312R/technicaldocuments to find the EVM.

    - The SPI interface is possible to map to any (unused) DIO

    - As far as I know, any external flash with a interface CC1312R has would do. It's also dependent of how much data etc you want to save. 

  • Hi,

    Thank you for the answers, but have few more.

    - for SPI external Flash it is important to know the Byte/page organization, can you give me a few references you used in yours reff design please.

    Thank you.

  • The NVS driver is written for the following:

    * # Overview #
    *
    * The NVSSPI25X module allows you to manage SPI flash memory.
    * This driver works with most 256 byte/page SPI flash memory devices
    * such as:
    *
    * Winbond W25xx family
    * Macronics MX25Rxx family
    * Micron N25Qxx family
    *
    * The SPI flash commands used by this driver are as follows:
    *
    * @code
    * #define SPIFLASH_PAGE_WRITE 0x02 // Page Program (up to 256 bytes)
    * #define SPIFLASH_READ 0x03 // Read Data
    * #define SPIFLASH_READ_STATUS 0x05 // Read Status Register
    * #define SPIFLASH_WRITE_ENABLE 0x06 // Write Enable
    * #define SPIFLASH_SUBSECTOR_ERASE 0x20 // SubSector (4K bytes) Erase
    * #define SPIFLASH_SECTOR_ERASE 0xD8 // Sector (usually 64K bytes) Erase
    * #define SPIFLASH_RDP 0xAB // Release from Deep Power Down
    * #define SPIFLASH_DP 0xB9 // Deep Power Down
    * #define SPIFLASH_MASS_ERASE 0xC7 // Erase entire flash.
    * @endcode
    *
    * It is assumed that the SPI flash device used by this driver supports
    * the byte programmability of the SPIFLASH_PAGE_WRITE command and that
    * write page size is 256 bytes. The erase sector and subsector sizes are
    * assumed to be 64K and 4K respectively.

    But it's possible to change the driver if needed.

  • Thank you very much TER !