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LAUNCHXL-CC1310: SPI connection problem revealed between LaunchPAD and memory device

Part Number: LAUNCHXL-CC1310
Other Parts Discussed in Thread: CC1310

Hello, M-W.

This is mainly to inform you that I have managed to discover the problem I had with the Winbond memory. And I did it without the help of Winbond: they haven't answered me by now, more than one month later!... :(

I have managed to discovered the problem after buying some other memories from other manufacturers. I tested the MT29F1G01ABAFDSF from Micron and it worked from the beginning with SPI Mode 0 and 1MHz clock (the same conditions as with Winbond memory). Then I tested it with the highest frequency TI CC13010 SPI can manage: 12MHz and it failed.

I am prototyping so I am using a breadboard for the memory and connecting it with the TI CC1310 LaunchPAD through wires. As you pointed about the way the board was connected to the device, the problem are those cables (worse even when I have to add the oscilloscope probes: the memory board kit is big and I had to place even more wires to be able to connect the probes to the breadboard) in high frequency modes. They must add capacitances and inductances that affect the output of the memories. Winbond memories must be more sensitive to this than Micron ones.

So I got Winbond memories working reducing the SPI frequency to 10KHz. But I need to test the memories at 12MHz, so I managed to reduce the distance of the wirings and lastly I got both memories (Winbond and Micron) working at 12MHz.

I tried lowering the SPI clock in the first tests I did, but as it didn't work (possibly because I had also problems with the SPI phase and polarity modes) and I read somewhere about limitations in the lowest SPI clock bitrate (don't ask me now where...) I didn't try again til now.

Hope this helps others to be more careful about the SPI bus connection while prototyping!

One last subject about the SPI modes: I finally use mode 3 (SPI_POL1_PHA1) with the internal SPI CS and the minDmaTransferSize=1 for the Winbond memory. But I can't use the mode 0 (SPI_POL0_PHA0) with the internal SPI CS and the minDmaTransferSize=1, because it makes CS going High and Low again after every byte transfer (in mode 0 CS stays Low all the SPI transaction).

So if I want to use mode 0, I have to use a external software CS.

I know you have answered me before that this is the way TI have decided to program the SPI driver, but I continue thinking it would not be so difficult to separate the CS and the POL_PHA behaviour, and with a minimum change it would give many more configuration options.

Please, consider this as a suggestion to implement in future releases. Thank you very much!

Best regards,

Juan Pablo Novo

  • Hi Juan Pablo,

    What version of the SimpleLink CC13x0 SDK are you using?

  • Thanks for sharing Juan!

    The CS question is something that has come up now and then. The general argument behind the design choice is that the driver provides the HW capabilities of the SSI modules, including the HW CS solution. The driver allows for this to be left un-configured so that the user can setup their own SW CS instead.

    Not implementing this into the driver gives a possible save in flash footprint (more often than not, the internal CS is OK) while also making sure that we do not further limit the configuration options. In other words, leaving it up to the user makes sure you could always control it in the way dictated by the situation. Take for example a scenario where you need to pull CS low a long period before communicating in order to wake the other side. This could of course be part of the driver, but it would further drive overall footprint and in many cases, customers want the lowest footprint possible.

  • Hi, Marie.

    I am using the last SimpleLink CC13x0 SDK that is showing in Resource Explorer: 3.20.00.23

    Code Composer Studio Version: 9.3.0.00012

    Regards,

    Juan Pablo Novo