This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Compiler/CC1350: FEC decoder at receiver side of CC1350

Part Number: CC1350

Tool/software: TI C/C++ Compiler

Hi guys.

I'm trying to implement manually by matlab code a FEC decoder that CC1350 microcontroller use , it means to implement as software a viterbi decoder that the guys here used for cc1350.

according to swr64 PDF and after discussing on the forum I recognized that the type of the decoder of cc1350 at receiver side is based upon soft decoding with viterbi algotihm.

I purchased the book of Bernard Sklar, Digital Communications – Fundamentals and Applications, 2nd Edition and Im not succeeding to implement successfully the FEC decoder in order to decode my transmitted packets of cc1350.... it's more related to Texas instrument implementation .

In my implementation I arrived that on the output of my demodulator I see my syncword of LRM mode (mode 2)  as binary data and I see the pattern of DSSS according to its table as binary data (like 00110011 or 11001100 if DSSS=8) , 

I succeeded to made the de-interleaver to reverse my bits to what it was before DSSS block (implicitly the output of encoder)

so Im trying to implement in matlab viterbi decoder upon soft decision and Im not succeeding , the input to the decoder is binary data (output of encoder) and Im not even understand how viterbi decoder upon soft decision will work if the input is binary data 0 or 1 ... so maybe the implementation viterbi decoder hard decision ? Any help please? 

Im stuck on this and appreciated for any help, once again the input to the decoder is a packet in binary data and I see the syncword/preamable in it.

thanks alot for any assistance.

  •  appreciated for any help !

  • Hi,

    We cannot support how to design a modem for your research project. The E2E is mainly to provide support for customers using our radios / ICs for their designs. Providing support for general matlab decoding models is not in the realm of this support channel. 

    Wish you the best of success with your research project.

    Regards, 

       Richard

  • Hi ! , I understand you very well but something is confusing me and Im not asking how to design the decoder / modem , what Im asking is something to understand how the modem works and appreciate if you could help !

    Once again Im not asking how to design, my problem is as following:

    I'm trying to built software receiver side of CC1350 packets , I succeeded to build demodulator and the output of my demodulator is binary data of 

    my transmitted packets, this means in LRM mode 2 I see at the output of my demodulator the syncword/preamble/payload ..now what's confusing me is the decoder stage, you said that the decoder is soft decision upon viterbi algorithm, but the input to the decoder should be the output of demodulator it means the input to the decoder is binary data (0/1) and it's not soft decision decoder because soft decision decoder means that the input is range between 0 to n^k (k is length of encoder) ..so here Im stuck!

    Maybe the decoder of cc1350 is hard decision and not soft decision upon Viterbi algorithm? Im asking this question because in the hard decision upon viterbi algorithm the decoder should have binary data (0/1) as what I get on the output of my demodulator and that's logically correspond .

    note- the encoder of transmitter side as I understand from swr64 is k=7 , r=1/2 ,  and it starts with all zero states(initial states are zeros of registers) and finish with all zero states if not then a pleasurer to correct me.

    thanks alot for any help / assistance .