CC1120: RX Sniff Mode stops interrupt on packet received on frequency change

Sutton Mehaffey

Part Number: CC1120

Weird problem - I have a project designed around 450MHZ. I have both a TX board and RX board. Very similar boards - the radio circuit is the same. The RX Sniff mode works great. I recently discovered that I overlooked changing the FS_CFG register from 800MHZ (which was copied from SmartRF) for both the RX and TX setups. If I change the FS_CFG register to 0x14 for 410-480MHZ on the RX setup, RX sniff mode stops working properly. The EVENT0 wakeup still happens via looking at a scope, but the radio chip doesn't produce an interrupt on a TX packet received. The TX can be set up with either 0x12 (800) or 0x14 (450) and as long as the RX has 0x12, it works and processes the packet. But, 0x14 (which I think is the proper value) will not cause an interrupt. Any reason why?

over 4 years ago

0 Siri over 4 years ago

TI__Guru* 86241 points

I do not think the problem is that you do not get an interrupt on packet received, but that you are simply not receiving any packets. I guess you will see the exact same thing if you run normal RX and TX with the same settings.

Without knowing anything about any of your other settings, it is not possible to answer why FS_CFG = 0x14 does not work.

Please post your register settings, and I can take a look.

Siri

0 Sutton Mehaffey over 4 years ago in reply to Siri

Expert 1205 points

You would think so, but not true. I have 2 different settings for my RX board (RX continuous and RX Sniff) that I experiment with. In RX continuous mode, it works as expected. FS_CFG must be the same in both RX and TX (0x14 or 0x12) and packets are received. If they are different, it doesn't work. I tried all 4 combinations.

In RX sniff mode, both the same won't work. But, 0x12 in the RX and 0x14 in the TX works for some reason. The other 3 combinations do not work. Weird.

Here are my register settings. Hopefully, the format won't scramble them up making them hard to read.

// Custom LPS setup - modified from SmartRF Expert Mode, RX Continuous

   unsigned char lps_cont_rx_setup_type[][3] = {{IOCFG3,0x31,YES},{IOCFG2,0xB0,YES},{IOCFG1,0xB0,YES},{IOCFG0,0x06,YES},     // OSC running, NA, NA, packet received
                       {SYNC3,'A',YES},{SYNC2,'G',YES},{SYNC1,'A',YES},{SYNC0,'L',YES},{SYNC_CFG1,0x0B,YES},
                       {DCFILT_CFG,0x1C,YES},{PREAMBLE_CFG1,0x18,YES},{IQIC,0xC6,YES},{CHAN_BW,0x08,YES},{MDMCFG0,0x05,YES},
                       {AGC_REF,0x20,YES},{AGC_CS_THR,0x19,YES},{AGC_CFG1,0xA9,YES},{AGC_CFG0,0xCF,YES},{FIFO_CFG,0x00,YES},
                       {DEV_ADDR,0xCD,YES},{FS_CFG,0x14,YES},{PKT_CFG1,0x15,YES},{PKT_CFG0,0x00,YES},{PKT_LEN,0x0A,YES},
                       {IF_MIX_CFG,0x00,YES},{FREQOFF_CFG,0x22,YES},{FREQ2,0x6C,YES},{FREQ1,0x80,YES},{FS_DIG1,0x00,YES},
                       {FS_DIG0,0x5F,YES},{FS_CAL1,0x40,YES},{FS_CAL0,0x0E,YES},{FS_DIVTWO,0x03,YES},{FS_DSM0,0x33,YES},
                       {FS_DVC0,017,YES},{FS_PFD,0x50,YES},{FS_PRE,0x6E,YES},{FS_REG_DIV_CML,0x14,YES},
                       {FS_SPARE,0xAC,YES},{FS_VCO0,0xB4,YES},{XOSC5,0x0E,YES},{XOSC1,0x03,YES}};

   // Custom LPS setup - modified from SmartRF Expert Mode, RX Sniff Mode

   unsigned char lps_rx_sniff_cs_setup_type[][3] = {{IOCFG3,0xB0,YES},{IOCFG2,0x37,YES},{IOCFG1,0xB0,YES},{IOCFG0,0x06,YES},     // NA, WOR_EVENT0, NA, packet received
                       {SYNC3,'A',YES},{SYNC2,'G',YES},{SYNC1,'A',YES},{SYNC0,'L',YES},{SYNC_CFG1,0x0B,YES},{DEVIATION_M,0x48,YES},
                       {MODCFG_DEV_E,0x05,YES},{DCFILT_CFG,0x1C,YES},{PREAMBLE_CFG1,0x18,YES},{IQIC,0x00,YES},{CHAN_BW,0x04,YES},
                       {MDMCFG0,0x05,YES},{AGC_CS_THR,0xF5,YES},{AGC_CFG1,0xA0,YES},{FIFO_CFG,0x00,YES},{DEV_ADDR,0xCD,YES},{SETTLING_CFG,0x03,YES},
                       {FS_CFG,0x12,YES},{WOR_CFG0,0x20,YES},{WOR_EVENT0_MSB,0x02,YES},{WOR_EVENT0_LSB,0x14,YES},{PKT_CFG1,0x15,YES},
                       {RFEND_CFG0,0x09,YES},{PKT_LEN,0x0A,YES},
                       {IF_MIX_CFG,0x00,YES},{FREQOFF_CFG,0x22,YES},{FREQ2,0x6C,YES},{FREQ1,0x80,YES},
                       {FS_DIG1,0x00,YES},{FS_DIG0,0x5F,YES},{FS_CAL1,0x40,YES},{FS_CAL0,0x0E,YES},{FS_DIVTWO,0x03,YES},
                       {FS_DSM0,0x33,YES},{FS_DVC0,0x17,YES},{FS_PFD,0x50,YES},{FS_PRE,0x6E,YES},{FS_REG_DIV_CML,0x14,YES},
                       {FS_SPARE,0xAC,YES},{FS_VCO0,0xB4,YES},{XOSC5,0x0E,YES},{XOSC0,0x00,YES},{XOSC1,0x03,YES}};

   // Custom LPS setup - modified from SmartRF Expert Mode, Packet TX

   unsigned char lps_tx_setup_type[][3] = {{IOCFG3,0xB0,YES},{IOCFG2,0xB0,YES},{IOCFG1,0xB0,YES},{IOCFG0,0x31,YES},        // NA, NA, NA, OSC running
                       {SYNC3,'A',YES},{SYNC2,'G',YES},{SYNC1,'A',YES},{SYNC0,'L',YES},                                    // Sync Word 'AGAL'
                       {SYNC_CFG1,0x0B,YES},{DCFILT_CFG,0x1C,YES},{PREAMBLE_CFG1,0x18,YES},                                // Preamble 4 bytes and 'AA'
                       {IQIC,0xC6,YES},{CHAN_BW,0x08,YES},{MDMCFG0,0x05,YES},{AGC_REF,0x20,YES},{AGC_CS_THR,0x19,YES},     // default settings from Expert Mode
                       {AGC_CFG1,0xA9,YES},{AGC_CFG0,0xCF,YES},{FIFO_CFG,0x00,YES},                                        // default settings from Expert Mode
                       {DEV_ADDR,0xCD,YES},{FS_CFG,0x14,YES},{PKT_CFG1,0x15,YES},{PKT_CFG0,0x00,YES},{PKT_LEN,0x0A,YES},   // Device Address - 'CD', 410-480MHZ, address check, fixed length
                       {IF_MIX_CFG,0x00,YES},{FREQOFF_CFG,0x22,YES},{FREQ2,0x6C,YES},{FREQ1,0x80,YES},{FS_DIG1,0x00,YES}, // default settings from Expert Mode
                       {FS_DIG0,0x5F,YES},{FS_CAL1,0x40,YES},{FS_CAL0,0x0E,YES},{FS_DIVTWO,0x03,YES},{FS_DSM0,0x33,YES},   // default settings from Expert Mode
                       {FS_DVC0,017,YES},{FS_PFD,0x50,YES},{FS_PRE,0x6E,YES},{FS_REG_DIV_CML,0x14,YES},                    // default settings from Expert Mode
                       {FS_SPARE,0xAC,YES},{FS_VCO0,0xB4,YES},{XOSC5,0x0E,YES},{XOSC1,0x03,YES}};                          // default settings from Expert Mode

0 Sutton Mehaffey over 4 years ago in reply to Sutton Mehaffey

Expert 1205 points

Note that FS_CFG might be 0x14. I was testing. It ultimately needs to be 0x12.

0 Siri over 4 years ago in reply to Sutton Mehaffey

TI__Guru* 86241 points

I have a couple of comments to your settings.

1) For the lps_cont_rx_setup_type, you set FS_DVC0 = 017 (0x11), instead of 0x17

2) You should be able to sleep longer in sniff mode, increasing WOR_EVENT0_LSB from 0x14 to 0xE9

3) Do you remember to perform manual calibration when using sniff mode?

For the regular RX mode, you use auto calibration of the synth (SETTLING_CFG = 0x0B), but for sniff mode, this is turned off (SETTLING_CFG = 0x03) to reduce current consumption

Siri

0 Sutton Mehaffey over 4 years ago in reply to Siri

Expert 1205 points

1. Thanks for catching that typo.

2. OK. Changed to 0xE9.

3. Yes. I manual calibrate no matter which mode I use. Before I enter the main loop. Does it hurt anything to manual calibrate for regular RX? Or is that just unnecessary and I should make it only for sniff mode?

Even with these changes, my issue still remains. If the RX is put in sniff mode, and at 400MHZ (FS_CFG = 0x12), the TX sending a packet at 400MHZ does not cause an interrupt to the RX. It does work if the RX is put in regular mode. Packets are processed every time. The wakeup pulses are there, but no interrupt is seen on the scope. I have the TX sending a packet every 5 seconds.

The strange thing is it does cause an interrupt if the TX is set to 800MHZ (FS_CFG = 0x14) and works every time the TX sends a packet (RX still set at 400MHZ). Don't have a clue why this is happening. However, in regular mode, both setups must have FS_CFG the same or it won't work (which is the way it should work).

Here are my settings again. Does the TX settings look OK? Notice that FS_CFG = 0x14 in the TX values, because this is what works in RF Sniff Mode.

   // Custom LPS setup - modified from SmartRF Expert Mode, Continuous RX setup
   // only differences - 4 preamble bytes instead of 3 (PREAMBLE_CFG1), 4 different sync bytes (SYNC3-SYNC0), address byte (DEV_ADDR & PKT_CFG1), fixed packet length of 10 (PKT_CFG0 & PKT_LEN)
   // the reason why there are many other register changes is that when chip is reset, default values are set in registers which are different than SmartRF Expert Mode

   unsigned char lps_cont_rx_setup_type[][3] = {{IOCFG3,0x31,YES},{IOCFG2,0xB0,YES},{IOCFG1,0xB0,YES},{IOCFG0,0x06,YES},     // OSC running, NA, NA, packet received
                       {SYNC3,'A',YES},{SYNC2,'G',YES},{SYNC1,'A',YES},{SYNC0,'L',YES},{SYNC_CFG1,0x0B,YES},
                       {DCFILT_CFG,0x1C,YES},{PREAMBLE_CFG1,0x18,YES},{IQIC,0xC6,YES},{CHAN_BW,0x08,YES},{MDMCFG0,0x05,YES},
                       {AGC_REF,0x20,YES},{AGC_CS_THR,0x19,YES},{AGC_CFG1,0xA9,YES},{AGC_CFG0,0xCF,YES},{FIFO_CFG,0x00,YES},
                       {DEV_ADDR,0xCD,YES},{FS_CFG,0x12,YES},{PKT_CFG1,0x15,YES},{PKT_CFG0,0x00,YES},{PKT_LEN,0x0A,YES},
                       {IF_MIX_CFG,0x00,YES},{FREQOFF_CFG,0x22,YES},{FREQ2,0x6C,YES},{FREQ1,0x80,YES},{FS_DIG1,0x00,YES},
                       {FS_DIG0,0x5F,YES},{FS_CAL1,0x40,YES},{FS_CAL0,0x0E,YES},{FS_DIVTWO,0x03,YES},{FS_DSM0,0x33,YES},
                       {FS_DVC0,0x17,YES},{FS_PFD,0x50,YES},{FS_PRE,0x6E,YES},{FS_REG_DIV_CML,0x14,YES},
                       {FS_SPARE,0xAC,YES},{FS_VCO0,0xB4,YES},{XOSC5,0x0E,YES},{XOSC1,0x03,YES}};

   // Custom LPS setup - modified from SmartRF Expert Mode, RX Sniff Mode
   // WOR_EVENT0_LSB was suggested to be 0xE9 by TI support for longer sleep time

   unsigned char lps_rx_sniff_cs_setup_type[][3] = {{IOCFG3,0xB0,YES},{IOCFG2,0x37,YES},{IOCFG1,0xB0,YES},{IOCFG0,0x06,YES},     // NA, WOR_EVENT0, NA, packet received
                       {SYNC3,'A',YES},{SYNC2,'G',YES},{SYNC1,'A',YES},{SYNC0,'L',YES},{SYNC_CFG1,0x0B,YES},{DEVIATION_M,0x48,YES},
                       {MODCFG_DEV_E,0x05,YES},{DCFILT_CFG,0x1C,YES},{PREAMBLE_CFG1,0x18,YES},{IQIC,0x00,YES},{CHAN_BW,0x04,YES},
                       {MDMCFG0,0x05,YES},{AGC_CS_THR,0xF5,YES},{AGC_CFG1,0xA0,YES},{FIFO_CFG,0x00,YES},{DEV_ADDR,0xCD,YES},{SETTLING_CFG,0x03,YES},
                       {FS_CFG,0x12,YES},{WOR_CFG0,0x20,YES},{WOR_EVENT0_MSB,0x02,YES},{WOR_EVENT0_LSB,0xE9,YES},{PKT_CFG1,0x15,YES},
                       {RFEND_CFG0,0x09,YES},{PKT_LEN,0x0A,YES},
                       {IF_MIX_CFG,0x00,YES},{FREQOFF_CFG,0x22,YES},{FREQ2,0x6C,YES},{FREQ1,0x80,YES},
                       {FS_DIG1,0x00,YES},{FS_DIG0,0x5F,YES},{FS_CAL1,0x40,YES},{FS_CAL0,0x0E,YES},{FS_DIVTWO,0x03,YES},
                       {FS_DSM0,0x33,YES},{FS_DVC0,0x17,YES},{FS_PFD,0x50,YES},{FS_PRE,0x6E,YES},{FS_REG_DIV_CML,0x14,YES},
                       {FS_SPARE,0xAC,YES},{FS_VCO0,0xB4,YES},{XOSC5,0x0E,YES},{XOSC0,0x00,YES},{XOSC1,0x03,YES}};

   // Custom LPS setup - modified from SmartRF Expert Mode, Packet TX

   unsigned char lps_tx_setup_type[][3] = {{IOCFG3,0xB0,YES},{IOCFG2,0xB0,YES},{IOCFG1,0xB0,YES},{IOCFG0,0x31,YES},        // NA, NA, NA, OSC running
                       {SYNC3,'A',YES},{SYNC2,'G',YES},{SYNC1,'A',YES},{SYNC0,'L',YES},                                      // Sync Word 'AGAL'
                       {SYNC_CFG1,0x0B,YES},{DCFILT_CFG,0x1C,YES},{PREAMBLE_CFG1,0x18,YES},                                  // Preamble 4 bytes and 'AA'
                       {IQIC,0xC6,YES},{CHAN_BW,0x08,YES},{MDMCFG0,0x05,YES},{AGC_REF,0x20,YES},{AGC_CS_THR,0x19,YES},     // default settings from Expert Mode
                       {AGC_CFG1,0xA9,YES},{AGC_CFG0,0xCF,YES},{FIFO_CFG,0x00,YES},                                        // default settings from Expert Mode
                       {DEV_ADDR,0xCD,YES},{FS_CFG,0x14,YES},{PKT_CFG1,0x15,YES},{PKT_CFG0,0x00,YES},{PKT_LEN,0x0A,YES},   // Device Address - 'CD', 410-480MHZ, address check, fixed length
                       {IF_MIX_CFG,0x00,YES},{FREQOFF_CFG,0x22,YES},{FREQ2,0x6C,YES},{FREQ1,0x80,YES},{FS_DIG1,0x00,YES}, // default settings from Expert Mode
                       {FS_DIG0,0x5F,YES},{FS_CAL1,0x40,YES},{FS_CAL0,0x0E,YES},{FS_DIVTWO,0x03,YES},{FS_DSM0,0x33,YES},    // default settings from Expert Mode
                       {FS_DVC0,0x17,YES},{FS_PFD,0x50,YES},{FS_PRE,0x6E,YES},{FS_REG_DIV_CML,0x14,YES},                 // default settings from Expert Mode
                       {FS_SPARE,0xAC,YES},{FS_VCO0,0xB4,YES},{XOSC5,0x0E,YES},{XOSC1,0x03,YES}};                        // default settings from Expert Mode

RX mode - continuous, TX and RX same freq (400 or 800) - it works - PERFECT

RX mode - continuous, TX and RX different freq - it doesn't work - PERFECT

RX mode - Sniff Mode, RX set to 400, TX set to 400 - it doesn't work - WHY NOT

RX mode - Sniff Mode, RX set to 400, TX set to 800 - IT WORKS - not sure why??

RX mode - Sniff Mode, RX set to 800, TX set to 400 - it doesn't work

RX mode - Sniff Mode, RX set to 800, TX set to 800 - it doesn't work

0 Sutton Mehaffey over 4 years ago in reply to Sutton Mehaffey

Expert 1205 points

Is there a way to set up the eval board to transmit a packet every 5 seconds to see if that works? Is there a way to make that change?

0 Sutton Mehaffey over 4 years ago in reply to Sutton Mehaffey

Expert 1205 points

So, in trying to figure out the Sniff RF freq issue, I backtracked a bit and tried to set up the eval board (TRXEB) in Packet RX mode to receive packets from my custom TX board. I have a custom RX board that receives packets from my custom TX board as long as it is in a continuous RX state. Using the same register values, the eval board won't acknowledge the packet, but my custom TX board does every time. Here are my registers for both RX and TX. Do you see anything that would prevent the eval board from responding? The file is the .xml file I upload into the eval board (which matches my custom RX board settings). The TX register setup works with my custom RX setup, but not with the eval board.

   unsigned char lps_tx_setup_type[][3] = {{IOCFG3,0xB0,YES},{IOCFG2,0xB0,YES},{IOCFG1,0xB0,YES},{IOCFG0,0x31,YES},            // NA, NA, NA, OSC running
                       {SYNC3,'A',YES},{SYNC2,'G',YES},{SYNC1,'A',YES},{SYNC0,'L',YES},{SYNC_CFG1,0x0B,YES},                   // Sync Word 'AGAL'
                       {DCFILT_CFG,0x1C,YES},{PREAMBLE_CFG1,0x18,YES},{IQIC,0xC6,YES},{CHAN_BW,0x08,YES},{MDMCFG0,0x05,YES},   // Preamble 4 bytes and 'AA'
                       {AGC_REF,0x20,YES},{AGC_CS_THR,0x19,YES},{AGC_CFG1,0xA9,YES},{AGC_CFG0,0xCF,YES},{FIFO_CFG,0x00,YES},   // default settings from Expert Mode
                       {FS_CFG,0x14,YES},{PKT_CFG1,0x15,YES},{PKT_LEN,0x0A,YES},                                               // 410-480MHZ, address check, fixed length of 10
                       {IF_MIX_CFG,0x00,YES},{FREQOFF_CFG,0x22,YES},{FREQ2,0x6C,YES},{FREQ1,0x80,YES},{FS_DIG1,0x00,YES},      // default settings from Expert Mode
                       {FS_DIG0,0x5F,YES},{FS_CAL1,0x40,YES},{FS_CAL0,0x0E,YES},{FS_DIVTWO,0x03,YES},{FS_DSM0,0x33,YES},       // default settings from Expert Mode
                       {FS_DVC0,0x17,YES},{FS_PFD,0x50,YES},{FS_PRE,0x6E,YES},{FS_REG_DIV_CML,0x14,YES},                       // default settings from Expert Mode
                       {FS_SPARE,0xAC,YES},{FS_VCO0,0xB4,YES},{XOSC5,0x0E,YES},{XOSC1,0x03,YES}};                              // default settings from Expert Mode

Fullscreen Eval_Board_RX_Cont_LPS.xml Download

<?xml version="1.0" encoding="ISO-8859-1"?>
<!DOCTYPE configuration SYSTEM "C:/Program Files (x86)/SmartRF Studio 7/config/xml/configdata.dtd"[]>
<dcpanelconfiguration>
    <Devicename>CC1120</Devicename>
    <Description>Saved configuration data</Description>
    <registersettings>
        <Register>
            <Name>AGC_CFG0</Name>
            <Value>0xcf</Value>
        </Register>
        <Register>
            <Name>AGC_CFG1</Name>
            <Value>0xa9</Value>
        </Register>
        <Register>
            <Name>AGC_CS_THR</Name>
            <Value>0x19</Value>
        </Register>
        <Register>
            <Name>AGC_REF</Name>
            <Value>0x20</Value>
        </Register>
        <Register>
            <Name>CHAN_BW</Name>
            <Value>0x08</Value>
        </Register>
        <Register>
            <Name>DCFILT_CFG</Name>
            <Value>0x1c</Value>
        </Register>
        <Register>
            <Name>FIFO_CFG</Name>
            <Value>0x00</Value>
        </Register>
        <Register>
            <Name>FREQ1</Name>
            <Value>0x80</Value>
        </Register>
        <Register>
            <Name>FREQ2</Name>
            <Value>0x6c</Value>
        </Register>
        <Register>
            <Name>FREQOFF_CFG</Name>
            <Value>0x22</Value>
        </Register>
        <Register>
            <Name>FS_CAL0</Name>
            <Value>0x0e</Value>
        </Register>
        <Register>
            <Name>FS_CAL1</Name>
            <Value>0x40</Value>
        </Register>
        <Register>
            <Name>FS_CFG</Name>
            <Value>0x14</Value>
        </Register>
        <Register>
            <Name>FS_DIG0</Name>
            <Value>0x5f</Value>
        </Register>
        <Register>
            <Name>FS_DIG1</Name>
            <Value>0x00</Value>
        </Register>
        <Register>
            <Name>FS_DIVTWO</Name>
            <Value>0x03</Value>
        </Register>
        <Register>
            <Name>FS_DSM0</Name>
            <Value>0x33</Value>
        </Register>
        <Register>
            <Name>FS_DVC0</Name>
            <Value>0x17</Value>
        </Register>
        <Register>
            <Name>FS_PFD</Name>
            <Value>0x50</Value>
        </Register>
        <Register>
            <Name>FS_PRE</Name>
            <Value>0x6e</Value>
        </Register>
        <Register>
            <Name>FS_REG_DIV_CML</Name>
            <Value>0x14</Value>
        </Register>
        <Register>
            <Name>FS_SPARE</Name>
            <Value>0xac</Value>
        </Register>
        <Register>
            <Name>FS_VCO0</Name>
            <Value>0xb4</Value>
        </Register>
        <Register>
            <Name>IF_MIX_CFG</Name>
            <Value>0x00</Value>
        </Register>
        <Register>
            <Name>IOCFG0</Name>
            <Value>0x40</Value>
        </Register>
        <Register>
            <Name>IOCFG1</Name>
            <Value>0xb0</Value>
        </Register>
        <Register>
            <Name>IOCFG2</Name>
            <Value>0x06</Value>
        </Register>
        <Register>
            <Name>IOCFG3</Name>
            <Value>0xb0</Value>
        </Register>
        <Register>
            <Name>IQIC</Name>
            <Value>0xc6</Value>
        </Register>
        <Register>
            <Name>MDMCFG0</Name>
            <Value>0x05</Value>
        </Register>
        <Register>
            <Name>MODEM_STATUS1</Name>
            <Value>0x10</Value>
        </Register>
        <Register>
            <Name>PARTNUMBER</Name>
            <Value>0x48</Value>
        </Register>
        <Register>
            <Name>PARTVERSION</Name>
            <Value>0x23</Value>
        </Register>
        <Register>
            <Name>PKT_CFG1</Name>
            <Value>0x15</Value>
        </Register>
        <Register>
            <Name>PKT_LEN</Name>
            <Value>0x0a</Value>
        </Register>
        <Register>
            <Name>PREAMBLE_CFG1</Name>
            <Value>0x18</Value>
        </Register>
        <Register>
            <Name>SYNC0</Name>
            <Value>0x4c</Value>
        </Register>
        <Register>
            <Name>SYNC1</Name>
            <Value>0x41</Value>
        </Register>
        <Register>
            <Name>SYNC2</Name>
            <Value>0x47</Value>
        </Register>
        <Register>
            <Name>SYNC3</Name>
            <Value>0x41</Value>
        </Register>
        <Register>
            <Name>SYNC_CFG1</Name>
            <Value>0x0b</Value>
        </Register>
        <Register>
            <Name>XOSC1</Name>
            <Value>0x03</Value>
        </Register>
        <Register>
            <Name>XOSC5</Name>
            <Value>0x0e</Value>
        </Register>
    </registersettings>
    <dcpanel>
        <Property name="m_chkRegView" role="44">2</Property>
        <Property name="m_chkCmdView" role="44">0</Property>
        <Property name="m_chkRfParameters" role="44">2</Property>
        <Property name="m_cmbUserMode" role="46">1</Property>
        <Property name="m_easyModeSettings" role="33">-1</Property>
        <Property name="m_typicalSettings" role="33">-1</Property>
        <Property name="m_testFuncPanel" role="37">3</Property>
    </dcpanel>
    <rfparameters>
        <Property name="m_cmbFrontends" role="46">0</Property>
        <Property name="m_chkHGMorBYP" role="44">2</Property>
        <Property name="m_cmbEmRevs" role="46">-1</Property>
        <Property name="Xtal Frequency" role="46">32.000000</Property>
    </rfparameters>
    <conttx>
        <Property name="m_rbtModulated" role="45">1</Property>
        <Property name="m_rbtUnmodulated" role="45">0</Property>
        <Property name="m_cmbDataFormat" role="46">-1</Property>
        <Property name="m_chkFreqSweep" role="44">0</Property>
        <Property name="m_chkChanSweep" role="44">0</Property>
    </conttx>
    <contrx>
        <Property name="m_cmbDataFormat" role="46">-1</Property>
        <Property name="m_chkAutoScroll" role="44">2</Property>
    </contrx>
    <packettx>
        <Property name="m_edtPayloadSize" role="42">10</Property>
        <Property name="m_edtPacketCount" role="42">100</Property>
        <Property name="m_edtPacketCountEsy" role="42">100</Property>
        <Property name="m_edtRandomPacketData" role="42">44 40 66 d0 6b c4 30 b7 </Property>
        <Property name="m_edtPacketData" role="42"></Property>
        <Property name="m_edtAccessAddress" role="42"></Property>
        <Property name="m_edtDeviceAddress" role="42"></Property>
        <Property name="m_chkAddSeqNbr" role="44">2</Property>
        <Property name="m_chkInfinite" role="44">0</Property>
        <Property name="m_chkInfiniteEsy" role="44">0</Property>
        <Property name="m_rbtRandom" role="45">1</Property>
        <Property name="m_rbtText" role="45">0</Property>
        <Property name="m_rbtHex" role="45">0</Property>
        <Property name="m_chkAdvanced" role="44">0</Property>
    </packettx>
    <packetrx>
        <Property name="m_edtPacketCount" role="42">100</Property>
        <Property name="m_edtPacketCountEsy" role="42">100</Property>
        <Property name="m_edtAccessAddress" role="42"></Property>
        <Property name="m_chkInfinite" role="44">0</Property>
        <Property name="m_chkInfiniteEsy" role="44">0</Property>
        <Property name="m_cmbViewFormat" role="46">0</Property>
        <Property name="m_chkSeqNbrIncluded" role="44">2</Property>
        <Property name="m_edtDumpFile" role="42"></Property>
        <Property name="m_chkAdvanced" role="44">0</Property>
        <Property name="m_chk802154gMode" role="44">0</Property>
    </packetrx>
    <commandpanel>
        <Property name="m_chkInsertLength" role="44">0</Property>
        <Property name="m_edtTxFifo" role="42"></Property>
        <Property name="m_edtRxFifo" role="42"></Property>
        <Property name="m_cmbInstrInput" role="46">-1</Property>
    </commandpanel>
    <packetRxSniffMode>
        <Property name="m_edtPreambleLength" role="42">4</Property>
        <Property name="m_edtCarrierSenseThreshold" role="42">-90</Property>
        <Property name="m_rbtRssi" role="45">1</Property>
        <Property name="m_rbtPreamble" role="45">0</Property>
    </packetRxSniffMode>
</dcpanelconfiguration>

0 Siri over 4 years ago in reply to Sutton Mehaffey

TI__Guru* 86241 points

To narrow down the problem you should stop testing settings and combinations that are not recommended.

That means that if you are operating on the 433 band you should FSD_BANDSELECT = 0100b and if you operate in the 868 band, FSD_BANDSELECT should be 0010b

You should ALWAYS use the same settings/frequencies in RX and TX.

I did a test using SmartRF Studio and two 868 MHz CC1120 EMS:

868 MHz:

Packet TX - > Packet RX: OK

PacketTX - > RX Sniff Mode: OK

I also tested the board on

433 MHz:

Packet TX - > Packet RX: OK

PacketTX - > RX Sniff Mode: OK

When testing on 433, the RSSI of the received signals where around 25 dB lower than when testing on 868, since the boards I am using is designed for operation in the 868 MHz band.

I will recommend that you do the same test on the LPs to verify that you get the same results.

Afterwards you do the exact same test on your HW (use recommended settings from Studio for both RX, RX Sniff and TX).

If this does not work, I would assume that your problems are HW related.

If you are able to receive with the normal RX but not with Sniff mode, you should look at the RSSI threshold.

In normal RX you will receive packets above sensitivity level, while in Sniff mode you will only receive packets where the signal strength is above the RSSI threshold

You do not have to issue an SCAL strobe if you are doing autocal.

Also note that for devices with the PARTVERSION register equal to 0x21, you need to do the manual calibration according to the workaround described in the errata note.

https://www.ti.com/lit/swrz039

Siri

0 Sutton Mehaffey over 4 years ago in reply to Siri

Expert 1205 points

Yes, I get that. I was simply stating that for months, my RF Sniff was working fine. Then, I discovered the RX was not set to 433MHZ like my TX. They were different by mistake from the demo code. When I changed so that both my TX and RX were at 433MHZ, RF sniff stopped working. And, I haven't figured out why. That's it. It wouldn't make sense to set to different freqs.

I always do the manual calibration anyway. My partversion is 0x23, I think.

0 Siri over 4 years ago in reply to Sutton Mehaffey

TI__Guru* 86241 points

If your HW does not work with the recommended settings from SmartRF Studio, but our LPs does, the problem must be related to your HW.

Are you following our reference design for your HW?

If you measure the RSSI when receiving with your HW compared to when using the LP?

0 Sutton Mehaffey over 4 years ago in reply to Siri

Expert 1205 points

I'll figure it out. Your support team confirmed that the HW design looked good months ago, when I had a few RF Sniff setting issues. So, probably not it. I'm working on trying to get the TRXEB board to send and receive packets with my TX and RX boards in continuous mode. My boards work perfectly in continuous mode. But have freq issues working in RF Sniff mode. Again, I'll figure it out.

0 Siri over 4 years ago in reply to Sutton Mehaffey

TI__Guru* 86241 points

Ok. Then I will close this case. If you are able to reproduce the issue on our LPs are are not getting them to work with recommended settings, Please let us know.

Siri

Sub-1 GHz

Sub-1 GHz forum

CC1120: RX Sniff Mode stops interrupt on packet received on frequency change