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CC1312R: CC1312 SIMPLELINK I2C

david c bassett69540
Intellectual 425 points
Part Number: CC1312R
Other Parts Discussed in Thread: BQ24250, BQ25792

Hi Everyone,

Does anyone have any snippet which would show I2C setup for writing a device address and register to read and then reading 2 bytes in the register? Or maybe a byte at one register address and then another? I am used to thin HAL layers just above the hardware and cannot follow through the I2CTransfer() to I2CSupportPrimeTransfer() to the I2CMasterDataPut() to the I2CMasterControl and see that the device address, data register write, then device address, data address read data happens with this one transaction unless there is more under the hood I am not seeing.

I could just plug code in and do a bunch of Beagle sniffing, but I don't want to reinvent the wheel so to speak if there is code out there already. I am used to ST HAL layers which seem so much cleaner and easier to follow. Right now I have to read and write to a BQ27441 and BQ24250 and eventually move to a BQ25792.

Thanks for any help

Dave Bassett

  • 0
    Guru 735685 points

    You can try to refer to i2ctmp and i2copt3001 examples.

  • 0 in reply to YiKai Chen
    Intellectual 425 points

    Hi YiKai,

    The reason I was asking is I2C.h and i2ctmp both do not address this question at all. I'll look at the C++ (which nobody in the embedded world code in) code and see what I can make of it. It should be straightforward: how do I talk to a chip with 64 registers and I want to read addresses 0x34, 0x35, and 0x36? I see how you read 5 bytes, but from where?? At what register address? Is there autoincrement assumed on the slave?

    db

  • 0 in reply to david c bassett69540
    Intellectual 425 points

    I have an update to my question:

    The only way it works out is if there is an automatic HWint right after the ACK/NACK. It gives the HWint the capability to tell the HW regs to either send a STOP or a restart if there are more bytes to send or receive. The datasheet does mention "the master generates interrupts when a transmit or receive operation completes". There is no further description of this in the tech ref manual. This is not exactly true, and can't be if the I2CCC26XX_hwiFxn() is taken as it says in the driver. Because the STOP hasn't happened, the interrupt has to happen before the transaction finalizes so it can decide how to end the transaction. In addition to that, after the MSTAT register is checked or there is no error and more to send, then I2CCC26XX_completeTransfer() is called.

    Therefore, it looks as if setting below might work because the I2ccc26xx.c checks if there are more writes to be performed before it checks if there are more reads to perform. I have to test this on the bus, but I believe this would work:

     *  i2cTransaction.slaveAddress = device address;
     *  i2cTransaction.writeBuf = register to read;
     *  i2cTransaction.writeCount = 1;
     *  i2cTransaction.readBuf = readBuf;
     *  i2cTransaction.readCount = 2;

    It would have been nice to see better explanations in the tech ref manual connecting the I2C module to code in the simplelink SDK. I also think the tech ref manual should update in the I2C section that the first data byte is still sent on the bus after a NACK instead of burying the "issue" inside the I2CCC26xx.c code.

    Dave Bassett

  • 0 in reply to david c bassett69540
    TI__Genius 14845 points

    Hi Dave, 

    Thanks for the update. 

    Did you get it to work using the above settings? 

    Thanks, 
    Elin