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CC1200: FIFO error appears even if the IC is configured for Synchronous serial mode

Part Number: CC1200

We have configured CC1200 to work in synchronous serial mode, but when we switch the IC between TX and RX modes FIFO error comes often and doesn't resolve until we send SFTX/SFRX commands.Request your help to resolve the same.

Find the configuration registers below

{CC1200_IOCFG2,            0x08},
  {CC1200_IOCFG0,            0x09},
  {CC1200_SYNC3,             0xF0},
  {CC1200_SYNC2,             0xCC},
  {CC1200_SYNC1,             0xF0},
  {CC1200_SYNC0,             0xCC},
  {CC1200_SYNC_CFG1,         0xA8},
  {CC1200_SYNC_CFG0,         0x13},
  {CC1200_DEVIATION_M,       0x68},
  {CC1200_MODCFG_DEV_E,      0x04},
  {CC1200_DCFILT_CFG,        0x26},
  {CC1200_PREAMBLE_CFG1,     0x00},
  {CC1200_PREAMBLE_CFG0,     0x8A},
  {CC1200_IQIC,              0x00},
  {CC1200_CHAN_BW,           0x82},
  {CC1200_MDMCFG1,           0x06},
  {CC1200_MDMCFG0,           0x05},
  {CC1200_SYMBOL_RATE2,      0x7F},
  {CC1200_SYMBOL_RATE1,      0x75},
  {CC1200_SYMBOL_RATE0,      0x10},
  {CC1200_AGC_REF,           0x45},
  {CC1200_AGC_CS_THR,        0x01},
  {CC1200_AGC_CFG1,          0x16},
  {CC1200_AGC_CFG0,          0x84},
  {CC1200_FIFO_CFG,          0x00},
  {CC1200_FS_CFG,            0x12},
  {CC1200_PKT_CFG2,          0x01},
  {CC1200_PKT_CFG1,          0x00},
  {CC1200_PKT_CFG0,          0x20},
  {CC1200_PA_CFG0,           0x55},
  {CC1200_PKT_LEN,           0xFF},
  {CC1200_IF_MIX_CFG,        0x18},
  {CC1200_TOC_CFG,           0x03},
  {CC1200_MDMCFG2,           0x00},
  {CC1200_FREQ2,             0x5B},
  {CC1200_FREQ1,             0x99},
  {CC1200_FREQ0,             0x98},
  {CC1200_IF_ADC1,           0xEE},
  {CC1200_IF_ADC0,           0x10},
  {CC1200_FS_DIG1,           0x04},
  {CC1200_FS_DIG0,           0x55},
  {CC1200_FS_CAL1,           0x40},
  {CC1200_FS_CAL0,           0x0E},
  {CC1200_FS_DIVTWO,         0x03},
  {CC1200_FS_DSM0,           0x33},
  {CC1200_FS_DVC0,           0x17},
  {CC1200_FS_PFD,            0x00},
  {CC1200_FS_PRE,            0x6E},
  {CC1200_FS_REG_DIV_CML,    0x1C},
  {CC1200_FS_SPARE,          0xAC},
  {CC1200_FS_VCO0,           0xB5},
  {CC1200_IFAMP,             0x0D},
  {CC1200_XOSC5,             0x0E},
  {CC1200_XOSC1,             0x03},
  {CC1200_PARTNUMBER,        0x20},
  {CC1200_PARTVERSION,       0x10},
  {CC1200_SERIAL_STATUS,     0x08},

Regards,

Rakshith Kumar

  • I know that some of the FIFO error flags are set in synchronous serial mode as well, but this should not be a problem as you are not using the FIFO.

    Why are you checking for these flags in serial. mode? Are you experiencing any problems other that the fact that the errors are reported?

    The only thing that is important is that if you change between sync serial mode and ordinary FIFO mode, you need to flush the FIFO to clear the error states before starting to use FIFO mode.

    BR

    Siri

  • We are checking these flags because the CC1200 enters into FIFO error states and stuck there forever until the FIFO is cleared. 

    Also we are not changing between FIFO mode and synchronous serial mode. Still we are getting FIFO errors and IC is not able to communicate until the errors are cleared.

    Regards,

    Rakshith

  • Please provide info on what MARCSTATE reports and what flags are set when this occurs.

    Also, are you switching between RX and TX without strobing IDLE in-between?

    BR

    Siri

  • For instance, when we send SRX strobe, MARC_STATE = 17 (RX_FIFO_ERR). After sending the command sequence SFRX-SIDLE-SRX, MARC_STATE becomes 109(RX);

    Let me know which flag states info is needed on above cases.

    Regards,

    Rakshith

  • I was just wondering if you were reading marcstate or if you had FIFO error flags output on GPIOs.

    When it fails, are you strobing RX from TX or from IDLE?

    SIri

  • Ya, I am reading the MARCSTATE.

    Always I am strobing RX from IDLE. The thing is we have implemented a workaround to avoid communication break by using SFRX-SIDLE-SRX sequence. But what we need is to avoid this FIFO error completely since its pretty frequent.

    Regards,

    Rakshith

  • Please provide more infomation on what you do in your code and how often it fails.

    I have done several tests, both with your settings and the recommended settings for serial mode from SmartRF Studio, and I am not able to reproduce the problem. I am changing mode from RX to TX, from TX to RX, from RX to RX (via IDLE), but are never getting any FIFO errors reported.

    My test code is below:

    while(TRUE)
    {
        // TX
        trxSpiCmdStrobe(CC120X_STX);
        waitMs(50);
        cc120xSpiReadReg(CC120X_MARCSTATE, &marcstate, 1);
        marcstate = marcstate&0x1F;
        if(marcstate != 0x13)
          while(1);
        // TX
        // |
        // RX
        trxSpiCmdStrobe(CC120X_SRX);
        waitMs(5000);
        cc120xSpiReadReg(CC120X_MARCSTATE, &marcstate, 1);
        marcstate = marcstate&0x1F;
        if(marcstate != 0x0D)
          while(1);
        // RX
        // |
        // IDLE
        trxSpiCmdStrobe(CC120X_SIDLE);
        waitMs(5);
        // IDLE
        // |
        // RX
        trxSpiCmdStrobe(CC120X_SRX);
        waitMs(5000);
        cc120xSpiReadReg(CC120X_MARCSTATE, &marcstate, 1);
        marcstate = marcstate&0x1F;
        if(marcstate != 0x0D)
          while(1);
        // RX
        // |
        // IDLE
        trxSpiCmdStrobe(CC120X_SIDLE);
        waitMs(5);
        // IDLE
        // |
        // RX
        trxSpiCmdStrobe(CC120X_SRX);
        waitMs(5000);
        cc120xSpiReadReg(CC120X_MARCSTATE, &marcstate, 1);
        marcstate = marcstate&0x1F;
        if(marcstate != 0x0D)
          while(1);
        // RX
    }

    BR

    Siri

  • Have you configured the IC in synchronous serial mode?

    Regards,

    Rakshith

  • yes. I have tested the code with the setting you posted in the first post, and I have also tested with settings exported from SmartRF Studio in Sync serial mode.

    Siri

  • Apart from given configuration, we are having lot of transmission and reception over RF. Also we are using SPI bit banging implemented. 

    Regards,

    Rakshith

  • I guess that if I shall be able to figure out what is going on, I need a way to re-produce the problem. Right now, I am not able to do so with my code, even if I am using your settings.

    Can you try to make a simple test code where you only go in and out of RX and or TX, like I did in my test, and see if you see any problems then? Do not send any packets while doing this test.

    BR

    Siri