Hello!
Could you help us or give an advise where to find the information?
We have a signal quality with a distance up to 3 km.
But we have very poor signal quality without direct line sight even for short distances.
It looks like signal reflections affects our setup.
Could you help us to understand what parameter settings lead to this situation?
Can we measure and tweak the settings somehow?
Here is our setup registers settings:
common setup:
cc1120_cmd ( SRES ) ; // reset chip
cc1120_set_reg ( IOCFG3, IOCFG_CFG_HIGHZ ); // GPIO3 IO Pin Configuration
cc1120_set_reg ( IOCFG2, IOCFG_CFG_HIGHZ ); // GPIO2 IO Pin Configuration
cc1120_set_reg ( IOCFG1, IOCFG_CFG_HIGHZ ); // GPIO1 IO Pin Configuration
cc1120_set_reg ( IOCFG0, IOCFG_CFG_HIGHZ ); // GPIO0 IO Pin Configuration
cc1120_set_reg ( MDMCFG0, 0x05 ); // General Modem Parameter Configuration Reg. 0
cc1120_set_reg ( FIFO_CFG, 0x00 ); // FIFO Configuration
cc1120_set_reg ( FS_CFG, 0x12 ); // Frequency Synthesizer Configuration
cc1120_set_reg ( PKT_CFG0, PKT_CFG0_LENGTH_CONFIG_VARIABLE ) ; // Packet Configuration Reg. 0
cc1120_set_reg ( PKT_LEN, 0xFF ); // Packet Length Configuration
cc1120_set_reg ( IF_MIX_CFG, 0x00 ); // IF Mix Configuration
// 868.000.000 Hz
cc1120_set_reg ( FREQ2, 0x6C ); // Frequency Configuration [23:16]
cc1120_set_reg ( FREQ1, 0x80 ); // Frequency Configuration [15:8]
cc1120_set_reg ( FREQ0, 0x00 ); // Frequency Configuration [7:0]
cc1120_set_reg ( FS_DIG1, 0x00 ); // Frequency Synthesizer Digital Reg. 1
cc1120_set_reg ( FS_DIG0, 0x5F ); // Frequency Synthesizer Digital Reg. 0
cc1120_set_reg ( FS_CAL1, 0x40 ); // Frequency Synthesizer Calibration Reg. 1
cc1120_set_reg ( FS_CAL0, 0x0E ); // Frequency Synthesizer Calibration Reg. 0
cc1120_set_reg ( FS_DIVTWO, 0x03 ); // Frequency Synthesizer Divide by 2
cc1120_set_reg ( FS_DSM0, 0x33 ); // FS Digital Synthesizer Module Configuration Reg. 0
cc1120_set_reg ( FS_DVC0, 0x17 ); // Frequency Synthesizer Divider Chain Configuration ..
cc1120_set_reg ( FS_PFD, 0x50 ); // Frequency Synthesizer Phase Frequency Detector Con..
cc1120_set_reg ( FS_PRE, 0x6E ); // Frequency Synthesizer Prescaler Configuration
cc1120_set_reg ( FS_REG_DIV_CML, 0x14 );// Frequency Synthesizer Divider Regulator Configurat..
cc1120_set_reg ( FS_SPARE, 0xAC ); // Frequency Synthesizer Spare
cc1120_set_reg ( FS_VCO0, 0xB4 ); // FS Voltage Controlled Oscillator Configuration Reg..
cc1120_set_reg ( XOSC5, 0x0E ); // Crystal Oscillator Configuration Reg. 5
cc1120_set_reg ( XOSC1, 0x03 ); // Crystal Oscillator Configuration Reg. 1
cc1120_set_reg ( RFEND_CFG1, RFEND_CFG1_RXOFF_MODE_IDLE_DEF | RFEND_CFG1_RXTIME_DIS_DEF | RFEND_CFG1_RX_TIME_QUAL_1_DEF ) ;
cc1120_set_reg ( RFEND_CFG0, RFEND_CFG0_CAL_END_WAKE_UP_DIS_DEF | RFEND_CFG0_TXOFF_MODE_IDLE_DEF | RFEND_CFG0_TERM_ON_BAD_PACKET_DIS_DEF ) ;
cc1120_set_reg ( PKT_CFG1, PKT_CFG1_ADDR_CHECK_CFG_OFF_DEF | PKT_CFG1_CRC_CFG_ON_0xFFFF_DEF | PKT_CFG1_BYTE_SWAP_OFF_DEF | PKT_CFG1_APPEND_STATUS_ON_DEF ) ;
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additional 300 bps setup:
cc1120_set_reg ( MODCFG_DEV_E, MODCFG_DEV_E_MODEM_MODE_DSSS_PN | MODCFG_DEV_E_MOD_FORMAT_2FSK_DEF | MODCFG_DEV_E_FREQ_DEV_EXPONENT_3_DEF ) ;
cc1120_set_reg ( DEVIATION_M, 0x06 ); // Frequency Deviation Configuration (default) // deviation = 32000000*(256+6)*2^3/2^24 = 3997,8 Hz
cc1120_set_reg ( SYNC_CFG1, 0x0F ); // Sync Word Detection Configuration Reg. 1
cc1120_set_reg ( DCFILT_CFG, 0x1C ); // Digital DC Removal Configuration
cc1120_set_reg ( IQIC, 0xC6 ); // Digital Image Channel Compensation Configuration
cc1120_set_reg ( CHAN_BW, CC_RXBW_25000 ); // Channel Filter Configuration DEV*1,56+BR+17,5 = 5*1,56+1,2+17,5 = 26,5
cc1120_set_reg ( AGC_REF, 0x20 ); // AGC Reference Level Configuration
cc1120_set_reg ( AGC_CFG1, 0xA9 ); // Automatic Gain Control Configuration Reg. 1
cc1120_set_reg ( AGC_CFG0, 0xCF ); // Automatic Gain Control Configuration Reg. 0
cc1120_set_reg ( FREQOFF_CFG, 0x22 ); // Frequency Offset Correction Configuration
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additional 50 kbps setup:
cc1120_set_reg ( MODCFG_DEV_E, MODCFG_DEV_E_MODEM_MODE_NORMAL_DEF | MODCFG_DEV_E_MOD_FORMAT_2GFSK | MODCFG_DEV_E_FREQ_DEV_EXPONENT_5 ) ;
cc1120_set_reg ( DEVIATION_M, 0x99 ); // Frequency Deviation Configuration // deviation = 32000000*(256+153)*2^5/2^24 = 24963,3 Hz
cc1120_set_reg ( SYNC_CFG1, 0x08 ); // Sync Word Detection Configuration Reg. 1
cc1120_set_reg ( DCFILT_CFG, 0x15 ); // Digital DC Removal Configuration
cc1120_set_reg ( PREAMBLE_CFG1, 0x18 ); // Preamble Length Configuration Reg. 1
cc1120_set_reg ( FREQ_IF_CFG, 0x3A ); // RX Mixer Frequency Configuration
cc1120_set_reg ( IQIC, 0x00 ); // Digital Image Channel Compensation Configuration
cc1120_set_reg ( CHAN_BW, CC_RXBW_100000 ); // (*) Channel Filter Configuration DEV*1,56+BR+17,6 = 25*1,56+50+17,5 = 106,5
cc1120_set_reg ( SYMBOL_RATE2, 0x99 ); // Symbol Rate Configuration Exponent and Mantissa [1..
cc1120_set_reg ( SYMBOL_RATE1, 0x99 ); // Symbol Rate Configuration Mantissa [15:8]
cc1120_set_reg ( SYMBOL_RATE0, 0x99 ); // Symbol Rate Configuration Mantissa [7:0]
cc1120_set_reg ( AGC_REF, 0x3C ); // AGC Reference Level Configuration
cc1120_set_reg ( AGC_CFG1, 0xA9 ); // Automatic Gain Control Configuration Reg. 1
cc1120_set_reg ( AGC_CFG0, 0xC0 ); // Automatic Gain Control Configuration Reg. 0
cc1120_set_reg ( PA_CFG0, 0x79 ); // Power Amplifier Configuration Reg. 0
cc1120_set_reg ( TOC_CFG, 0x0A ); // Timing Offset Correction Configuration
