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CC1310: Does holding the reset pin low keep the device in reset?

Part Number: CC1310

I am writing software for a CC1310, where the reset pin starts low, goes high, then decays back to low and stays there.  The device briefly seems to come alive, then freezes.

Although I think that bringing the processor out of hard reset and into bootup happens when the pin goes high again, I don't actually find clear support for this in either the CC1310 datasheet or the tech ref manual.  As far as I know this is a convention - the TM4C datasheets have some nice timing diagramsand and are clear about it.  The CC1310 docs mention pin reset as if we all know what that means, but without specifying it as clearly as, for example, the Tiva docs do.

Am I correct about this behavior for the CC1310?  Am I correct that this is a design convention?

Thanks,

- Bob Cram

  • This behavior is on a custom board.  The application behaves nicely on the launchpad, and does fine in the debugger (which seems to keep RESET  high except for a brief strobe when starting, but doesn't start correctly when powered up on the custom board, independent of the debugger.

  • On this device the reset is active low. 

    Could you share how you set the reset pin on your custom board? 

  • The board doesn't have a reset mechanism (except when connected to a debugger, in which case the reset pin is connected to the reset from the debugger).  On the board is a capacitor to ground, so that (as this is explained to me by the EE working with me to debug this system (who is not the board designer (who is not very available during this process))) the pin holds low for a brief time after power is turned on, then goes high (out of reset).  TCK, by the way, starts transition to high at about the same time, but has a steeper rise, and gets there first.

    And then voltage on the RESET_N begins to decay, down to about 1V after about 100ms, and continuing asymptotically toward zero.

    There's a symptom elsewhere on the board that suggests that the CC1310 program briefly runs, then quits.  We can't debug using Code Composer because the debugger makes the problem go away (I think by holding the reset pin high).

    My current thought is that we should investigate this falling RESET voltage, which I interpret as putting the chip back into reset, and therefore failing.  I don't really know what's cause and what's effect, but this seems important to me.

    Maybe I can rephrase my original question, based on your comment that "reset is active low".  I emphasize that I am asking a very newbie question here....

    1) Is reset a state, into which the chip is placed when the reset line is low, and from which the chip emerges and boots when the reset is unasserted (and goes high)?

    or...

    2) Is "reset" an event that happens once when the reset line goes low, and it doesn't matter whether the line goes high again, because the event has happened and the chip can now reboot.

    My understanding (which I am quite prepared to be told is wrong) is that the first case is true, and we should investigate the decay of the voltage on the reset pin as a potential cause of the failure of the app.  In that first case, the decay itself could be killing the app.

    If the second case were true, then maybe the decay would cause a second reboot, but the system would run and stay running, until or unless the reset pin went high again and then went low again.  [Yikes, this scenario makes very little sense to me.]

    I'll be grateful for any advice about this behavior, but I really would like to know whether case 1 above is correct.

    -- Bob

  • 1): Reset is a state. The chip starts to boot when the reset line goes high. Please see the reference design for the recommended external components on this pin. Basically you need to have an external pull-up. 

  • Thank you for your help.

    - Bob