RTOS/CC1310: 15.4-stack Long range mode SDK 2.20.00.38 not working

no_more_wires

Part Number: CC1310
Other Parts Discussed in Thread: CC1350

Tool/software: TI-RTOS

Still have issues with the Long range mode.(ref linked case)

UART trace from end device follows

IN (16:16:55.038) FE 1A 22 06 00 0A 83 02 12 34 00 00 00 00 12 34 DC AC 08 00 00 00 00 00 00 00 00 00 00 00 CD
OUT (16:16:55.151) FE 01 62 06 00 65
OUT (16:17:02.420) FE 0E 42 82 E1 FF FF 00 00 00 00 00 00 00 00 00 00 00 2F

PhyID set to 0x83 = 131 based on this define in API for MAC #define APIMAC_GENERIC_ETSI_LRM_863_PHY_131 131

Status = 0xE1 means channel is busy.

Tested several channels, but result is the same. So it is not actual noise on a specific channel.

Please advice.

over 7 years ago

0 Hector_r over 7 years ago

TI__Genius 12415 points

I will do some test to see if I can reproduce this behavior. In the meantime could you answer my questions below
What are you using as a host processor to control the coprocessor? are you using the 15.4 Linux gateway?
Are you using the default precompiled coprocesor hex files provided with the SDK or building your own using the coprocessor example project?
Have you tried this with the new release of the SDK v2.30?

0 no_more_wires over 7 years ago in reply to Hector_r

Expert 1530 points

Thanks Hector,

I have more info based on tests done today.
Somehow I think the problem is related to HW.

I did compile the coprocessor on SDK v 2.20 on cc1310_launchpad and this worked OK.
But compliing the same project (only swapping pins) to my HW gave the problem that end device does when doing Association request report status = E1. (MAC_CHANNEL_ACCESS_FAILURE)

So from a theoretical point of view I could be having much noise on my channel to prevent radio from seing a free channel.

But, the Mac attribute:rssiThreshold is -45 dBm(0xAD) and the noise I see using SmartRF studio is far less.
(tried to copy screenshot from SmartRFstudio, but was not possible. Noise floor is down at ~-120dBm. )
So I cannot see that there is a real problem with noise.

Challenge is for me to understand what possible causes it can be for Association Request to return E1, when there are not high noise level in channel?
And why this varies with HW. And why this is problem only at long-range-mode and not at 50kbps...

0 no_more_wires over 7 years ago in reply to no_more_wires

Expert 1530 points

Could this be related to chip rev A vs. B.
We use chip rev A. I though SKD 2.20 was backward compatible....

0 TER over 7 years ago in reply to no_more_wires

TI__Guru**** 317180 points

Not fully, see processors.wiki.ti.com/.../CC1310_rev_B_PCN_information

0 no_more_wires over 7 years ago in reply to TER

Expert 1530 points

Not really any help on this side. We are using SDK 2.20 which already shall have the fixes for PG2.1 = rev B.
Any I see this work on the launchpad with PG2.1.

My problem is having the 2.20.xx SDK work on rev A with regards to long range mode. LRM was working fine on SDK 1.50.xx. Between SDK 1.50 and 2.20 the entire mac_user_config.h and mac suser_config_cc13x0_subg_cop was refactored so it is hard to compare.

I expect TI tests mostly on chip rev B (PG21), but as you say the SDK support both version, my qustion is: Can you confirm that LRM on PG2.0 is verified for new stack releases?

On old SDK there was a set of overrides only for pg21
In the new stack I see not overrides dedicated for PG21.

..from old mac_user_config_CC13x0_cop.h
static uint32_t pLrmOverridesPG21[] =
{
// override_use_patch_simplelink_long_range.xml
// PHY: Use MCE RAM patch, RFE RAM patch
MCE_RFE_OVERRIDE(1,0,0,1,0,0),
// override_synth_prop_863_930_div5_lbw60k.xml
// Synth: Set recommended RTRIM to 7
HW_REG_OVERRIDE(0x4038,0x0037),
// Synth: Set Fref to 4 MHz
(uint32_t)0x000684A3,
// Synth: Configure fine calibration sett..
...

0 no_more_wires over 7 years ago in reply to no_more_wires

Expert 1530 points

I have confirmed this issue also on TI-HW (EM) chip rev A (PG2.0)
SDK 1.50 long range mode = OK
SDK 2.10, SDK 2.20 and SDK 2.30 long range mode all fail with status 0xE1.

-NMW

0 no_more_wires over 7 years ago in reply to no_more_wires

Expert 1530 points

SDK 1.60 also works with PG2.0 and LRM. So problem was introduced with SDK 2.10

no more wires

0 Hector_r over 7 years ago in reply to no_more_wires

TI__Genius 12415 points

Hi,
Thanks for all the information, I am taking a look at this issue. I will give you an update once I find something

0 no_more_wires over 7 years ago in reply to Hector_r

Expert 1530 points

Great Hector,
Looking forward for more info.
For your informaiton. When testing on on TI HW I used the precompiler coprocessor hex files and just made an association request on 5 kb/s.
It should reply 0xE9 (No beacon ) and your should see the request on the sniffer.
But with new SDK the request give status 0xE1 (CCA failed) and there are nothing seen on sniffer..

0 Hector_r over 7 years ago in reply to no_more_wires

TI__Genius 12415 points

Hi,

I was able to reproduce the issue, I am currently trying to find the root cause. I will keep you updated on my findings.

0 Hector_r over 7 years ago in reply to no_more_wires

TI__Genius 12415 points

Hi,

I found what is causing this in the newer SDKs. I was able to resolve this by commenting out two lines in the override "pOverrides_slr_CC1350" as shown below(Line #37 and #39)

static uint32_t pOverrides_slr_CC1350[] =
{
    // override_use_patch_simplelink_long_range.xml
    // PHY: Use MCE RAM patch, RFE RAM patch
    MCE_RFE_OVERRIDE(1,0,0,1,0,0),
    // override_synth_prop_863_930_div5_lbw60k.xml
    // Synth: Set recommended RTRIM to 7
    HW_REG_OVERRIDE(0x4038,0x0037),
    // Synth: Set Fref to 4 MHz
    (uint32_t)0x000684A3,
    // Synth: Configure fine calibration setting
    HW_REG_OVERRIDE(0x4020,0x7F00),
    // Synth: Configure fine calibration setting
    HW_REG_OVERRIDE(0x4064,0x0040),
    // Synth: Configure fine calibration setting
    (uint32_t)0xB1070503,
    // Synth: Configure fine calibration setting
    (uint32_t)0x05330523,
    // Synth: Set loop bandwidth after lock to 60 kHz
    (uint32_t)0x40410583,
    // Synth: Set loop bandwidth after lock to 60 kHz
    (uint32_t)0x32CC0603,
    // Synth: Set loop bandwidth after lock to 60 kHz
    (uint32_t)0x00010623,
    // Synth: Configure VCO LDO (in ADI1, set VCOLDOCFG=0x9F to use voltage input reference)
    ADI_REG_OVERRIDE(1,4,0x9F),
    // Synth: Configure synth LDO (in ADI1, set SLDOCTL0.COMP_CAP=1)
    ADI_HALFREG_OVERRIDE(1,7,0x4,0x4),
    // Synth: Use 24 MHz XOSC as synth clock, enable extra PLL filtering
    (uint32_t)0x02010403,
    // Synth: Configure extra PLL filtering
    (uint32_t)0x00108463,
    // Synth: Increase synth programming timeout (0x04B0 RAT ticks = 300 us)
    (uint32_t)0x04B00243,
    // override_synth_disable_bias_div5.xml
    // Synth: Set divider bias to disabled
    //HW32_ARRAY_OVERRIDE(0x405C,1), // COMMENT OUT THIS LINE FOR PG 2.0
    // Synth: Set divider bias to disabled (specific for loDivider=5)
    //(uint32_t)0x18000200,          // COMMENT OUT THIS LINE FOR PG 2.0
    // override_phy_rx_aaf_bw_0xd.xml
    // Rx: Set anti-aliasing filter bandwidth to 0xD (in ADI0, set IFAMPCTL3[7:4]=0xD)
    ADI_HALFREG_OVERRIDE(0,61,0xF,0xD),
    // override_phy_gfsk_rx.xml
    // Rx: Set LNA bias current trim offset to 3
    (uint32_t)0x00038883,
    // Rx: Freeze RSSI on sync found event
    HW_REG_OVERRIDE(0x6084,0x35F1),
    // override_phy_gfsk_pa_ramp_agc_reflevel_0x14.xml
    // Tx: Configure PA ramping setting (0x41). Rx: Set AGC reference level to 0x14.
    HW_REG_OVERRIDE(0x6088,0x4114),
    // Tx: Configure PA ramping setting
    HW_REG_OVERRIDE(0x608C,0x8213),
    // override_phy_long_range_dsss2.xml
    // PHY: Configure DSSS SF=2
    HW_REG_OVERRIDE(0x505C,0x0100),
    // override_phy_rx_rssi_offset_5db.xml
    // Rx: Set RSSI offset to adjust reported RSSI by +5 dB
    (uint32_t)0x00FB88A3,
    // TX power override
#if CCFG_FORCE_VDDR_HH
    // Tx: Set PA trim to max (in ADI0, set PACTL0=0xF8)
    ADI_REG_OVERRIDE(0,12,0xF8),
#endif
    (uint32_t)0x00000943, // Correct CRC initialization for 16-bit CRC
    (uint32_t)0x00000963, // Correct CRC initialization for 16-bit CRC
    (uint32_t)0xFFFFFFFF,
};

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RTOS/CC1310: 15.4-stack Long range mode SDK 2.20.00.38 not working