CC110L: RENASAS MICRO

vishal sapara

Intellectual 640 points

Part Number: CC110L
Other Parts Discussed in Thread: CC1101

Hello,

i am working on CC110L connected with renasas microcontroller.

i has follow below step to configure ic

1.RESETING CHIP

2.MAKING CHIP IN IDEAL STATE

3.CONFIGURING RADIO REGISTER

4.PA table writing

5.sending SFSTXON command

6.giving SNOP command

7.loading FIFO

8.sending STX command

i has send my code to you for reference.

Fullscreen r_main.c Download

/***********************************************************************************************************************
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* following link:
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* Copyright (C) 2011, 2018 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/

/***********************************************************************************************************************
* File Name    : r_main.c
* Version      : CodeGenerator for RL78/G12 V2.04.02.04 [18 May 2018]
* Device(s)    : R5F1026A
* Tool-Chain   : CCRL
* Description  : This file implements main function.
* Creation Date: 20-05-2019
***********************************************************************************************************************/

/***********************************************************************************************************************
Includes
***********************************************************************************************************************/
#include "r_cg_macrodriver.h"
#include "r_cg_cgc.h"
#include "r_cg_port.h"
#include "r_cg_serial.h"
/* Start user code for include. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
#include "r_cg_userdefine.h"

/***********************************************************************************************************************
Pragma directive
***********************************************************************************************************************/
/* Start user code for pragma. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */

/***********************************************************************************************************************
Global variables and functions
***********************************************************************************************************************/
/* Start user code for global. Do not edit comment generated here */
void delay(void);
void chip_select_low(void);
void chip_select_high(void);
void so_to_go_low(void);
void send_commnad_strobe(unsigned char);
void configure_cc110l_register(void);
void CC1101_Control_task(void);
void radio_reg_configure(unsigned char,unsigned char);
void whole_configuration(void);
void CC11XX_WritePatable(void);
void create_packet(uint8_t tx_buff[]);
void load_FIFO(void);
void CC1101_Initalization(void);
void radio_reg_READ(unsigned char);
uint8_t response,RESP_SRES_SIDLE=0x0F;
uint8_t z,brust_data=0x40;
uint8_t paTable[3]={0},BURST_DATA=0x40,PKTLEN=0x06,your_gate=0x05;
uint8_t MASK_LOWER_NIBBLE=0xf0,STATE_SFSTX=0x30,WRITE_STROBE=0x00;
uint8_t tx_buff[6];
uint8_t wait,retry_count;
struct my_data
{
unsigned volatile char  trnas_comleted         :1;
unsigned volatile char  reception_completed    :1;
}temp_my_data;
typedef enum cc_state_enum
{
    /// Resets chip
    CC_INIT_RESET,

    /// Configuration of radio
    CC_RADIO_CFG,

	/// Frequency Synthesizing
	CC_SFSTXON_TX,

	/// Get the status byte of the chip
	CC_SNOP_TX,

    /// Load data in FIFO
    CC_LOAD_FIFO,

    /// Transmit the data on Air
    CC_STX,

	/// Transition delay between state change
	CC11XX_WAIT_FOR_SEND,

    /// Flush TX FIFO condition
    CC_SFTX
} cc_state_enum;
cc_state_enum cc_state_assign;
/* End user code. Do not edit comment generated here */
void R_MAIN_UserInit(void);

/***********************************************************************************************************************
* Function Name: main
* Description  : This function implements main function.
* Arguments    : None
* Return Value : None
***********************************************************************************************************************/
void main(void)
{
    R_MAIN_UserInit();
    /* Start user code. Do not edit comment generated here */
    /* End user code. Do not edit comment generated here */
}

/***********************************************************************************************************************
* Function Name: R_MAIN_UserInit
* Description  : This function adds user code before implementing main function.
* Arguments    : None
* Return Value : None
***********************************************************************************************************************/
void R_MAIN_UserInit(void)
{
    /* Start user code. Do not edit comment generated here */
	EI();
	CC1101_Initalization();
	while (1)
	{
	 CC1101_Control_task();
	}
    /* End user code. Do not edit comment generated here */
}

/* Start user code for adding. Do not edit comment generated here */

void CC1101_Initalization(void)
{
	 chip_select_high();
	 cc_state_assign=CC_INIT_RESET;
	 temp_my_data.trnas_comleted=FALSE;
	 temp_my_data.reception_completed=FALSE;
}

void CC1101_Control_task(void)
{
	switch(cc_state_assign)

	{
	case CC_INIT_RESET:
		/// Reset CC110L chip
		send_commnad_strobe(CC1101_SRES);
		if(RESP_SRES_SIDLE==response)
		{
		cc_state_assign=CC_RADIO_CFG;
		}
		break;

	case CC_RADIO_CFG:
		/// Puts the chip in SIDLE
		send_commnad_strobe( CC1101_SIDLE );
		/// Configure Radio chip
		whole_configuration();
		/// Configure PATABLE for gain
		CC11XX_WritePatable();
		cc_state_assign=CC_SFSTXON_TX;
		radio_reg_configure(CC1101_TEST0,SMARTRF_SETTING_TEST0);
		break;

	case CC_SFSTXON_TX:
		///frequency
		send_commnad_strobe(CC1101_SFSTXON);
		cc_state_assign=CC_SNOP_TX;
		break;

	case CC_SNOP_TX:
		///NO OPERATION
		send_commnad_strobe(CC1101_SNOP);
		send_commnad_strobe(CC1101_SNOP);

		if((response & MASK_LOWER_NIBBLE)==STATE_SFSTX)
		{
			cc_state_assign=CC_LOAD_FIFO;
		}
		else
		{
			if(++retry_count<=5)
			{
			cc_state_assign=CC_SFSTXON_TX;
			}
			else
			{
			retry_count=0;
			CC1101_Initalization();
			}

		}
		break;

	case CC_LOAD_FIFO:
		///loading FIFO
		cc_state_assign=CC_STX;
		load_FIFO();
		break;

	case CC_STX:
		///write send
		send_commnad_strobe(CC1101_STX);
		send_commnad_strobe(CC1101_STX);
		cc_state_assign=CC11XX_WAIT_FOR_SEND;
		break;

	case CC11XX_WAIT_FOR_SEND:
		///wait for send
		for(wait=0;wait<=250;wait++)
		{
			delay();
			delay();
			delay();
			delay();
		}
		cc_state_assign=CC_SFTX;
		break;

	case CC_SFTX:
		///use it
		send_commnad_strobe(CC1101_SFTX);
		delay();
		delay();
		CC1101_Initalization();
		break;

	}

}

void delay(void)
{

	unsigned int i;
	for(i=0;i<=250;i++);

}

void chip_select_low(void)
{
	P1=P1 & (~(0x08));
}
void chip_select_high(void)
{
	P1=P1|0x08;
}
void so_to_go_low(void)
{

	while(0x02==(P1 & (0x02)));

}

void send_commnad_strobe(unsigned char command)
{
	 /// Chip select is made low

	chip_select_low();

	/// Wait for MISO pin to go low

	so_to_go_low();

	/// Send data on SPI

	R_CSI00_Start();
	delay();
	R_CSI00_Send_Receive(&command,ONE,&response);
	while((temp_my_data.trnas_comleted==FALSE) && (temp_my_data.reception_completed==FALSE));
	temp_my_data.trnas_comleted=FALSE;
	temp_my_data.reception_completed=FALSE;
	R_CSI00_Stop();
	delay();

	/// Wait for module response

	for(z=0;z<=200;z++)
	{
		delay();
		delay();
	}

}

void radio_reg_configure(unsigned char add,unsigned char valu)
{
	unsigned char radio_register[2],radio_response[2]={0};
	radio_register[0]=(brust_data|add);
	radio_register[1]=valu;

	/// Chip select is made low

	chip_select_low();

	/// Wait for MISO pin to go low

	so_to_go_low();

	/// Send data on SPI

	R_CSI00_Start();
	delay();
	R_CSI00_Send_Receive(&radio_register,TWO,&radio_response);
	while((temp_my_data.trnas_comleted==FALSE) && (temp_my_data.reception_completed==FALSE));
	temp_my_data.trnas_comleted=FALSE;
	temp_my_data.reception_completed=FALSE;
	R_CSI00_Stop();
	delay();
	chip_select_high();

}

void radio_reg_READ(unsigned char add)
{
	unsigned char radio_register[2],radio_response[2]={0};
	radio_register[0]=(brust_data|add);
	radio_register[1]=0x00;
	/// Chip select is made low

	chip_select_low();

	/// Wait for MISO pin to go low

	so_to_go_low();

	/// Send data on SPI

	R_CSI00_Start();
	delay();
	R_CSI00_Send_Receive(&radio_register,TWO,&radio_response);
	while((temp_my_data.trnas_comleted==FALSE) && (temp_my_data.reception_completed==FALSE));
	temp_my_data.trnas_comleted=FALSE;
	temp_my_data.reception_completed=FALSE;
	R_CSI00_Stop();
	delay();
	chip_select_high();

}

void whole_configuration(void)
{
	radio_reg_configure(CC1101_IOCFG0,SMARTRF_SETTING_IOCFG0);
	radio_reg_configure(CC1101_FIFOTHR,SMARTRF_SETTING_FIFOTHR);
	radio_reg_configure(CC1101_PKTCTRL0,SMARTRF_SETTING_PKTCTRL0);
	radio_reg_configure(CC1101_FSCTRL1,SMARTRF_SETTING_FSCTRL1);
	radio_reg_configure(CC1101_FREQ2,SMARTRF_SETTING_FREQ2);
	radio_reg_configure(CC1101_FREQ1,SMARTRF_SETTING_FREQ1);
	radio_reg_configure(CC1101_FREQ0,SMARTRF_SETTING_FREQ0);
	radio_reg_configure(CC1101_MDMCFG4,SMARTRF_SETTING_MDMCFG4);
	radio_reg_configure(CC1101_MDMCFG3,SMARTRF_SETTING_MDMCFG3);
	radio_reg_configure(CC1101_MDMCFG2,SMARTRF_SETTING_MDMCFG2);
	radio_reg_configure(CC1101_MDMCFG1,SMARTRF_SETTING_MDMCFG1);
	radio_reg_configure(CC1101_MDMCFG0,SMARTRF_SETTING_MDMCFG0);
	radio_reg_configure(CC1101_DEVIATN,SMARTRF_SETTING_DEVIATN);
	radio_reg_configure(CC1101_MCSM0,SMARTRF_SETTING_MCSM0);
	radio_reg_configure(CC1101_FOCCFG,SMARTRF_SETTING_FOCCFG);
	radio_reg_configure(0x20,SMARTRF_SETTING_RESERVED_0X20);
	radio_reg_configure(CC1101_FSCAL3,SMARTRF_SETTING_FSCAL3);
	radio_reg_configure(CC1101_FSCAL2,SMARTRF_SETTING_FSCAL2);
	radio_reg_configure(CC1101_FSCAL1,SMARTRF_SETTING_FSCAL1);
	radio_reg_configure(CC1101_FSCAL0,SMARTRF_SETTING_FSCAL0);
	radio_reg_configure(CC1101_TEST2,SMARTRF_SETTING_TEST2);
	radio_reg_configure(CC1101_TEST1,SMARTRF_SETTING_TEST1);
 	radio_reg_configure(CC1101_TEST0,SMARTRF_SETTING_TEST0);


 	radio_reg_READ(CC1101_IOCFG0_read);
 	radio_reg_READ(CC1101_FIFOTHR_read);
 	radio_reg_READ(CC1101_PKTCTRL0_read);
 	radio_reg_READ(CC1101_FSCTRL1_read);
 	radio_reg_READ(CC1101_FREQ2_read);
 	radio_reg_READ(CC1101_FREQ1_read);
 	radio_reg_READ(CC1101_FREQ0_read);
 	radio_reg_READ(CC1101_MDMCFG4_read);
 	radio_reg_READ(CC1101_MDMCFG3_read);
 	radio_reg_READ(CC1101_MDMCFG2_read);
 	radio_reg_READ(CC1101_MDMCFG1_read);
 	radio_reg_READ(CC1101_MDMCFG0_read);
 	radio_reg_READ(CC1101_DEVIATN_read);
 	radio_reg_READ(CC1101_MCSM0_read);
 	radio_reg_READ(CC1101_FOCCFG_read);
 	radio_reg_READ(0x20);
 	radio_reg_READ(CC1101_FSCAL3_read);
 	radio_reg_READ(CC1101_FSCAL2_read);
 	radio_reg_READ(CC1101_FSCAL1_read);
 	radio_reg_READ(CC1101_FSCAL0_read);
 	radio_reg_READ(CC1101_TEST2_read);
 	radio_reg_READ(CC1101_TEST1_read);
 	radio_reg_READ(CC1101_TEST0_read);

}

void CC11XX_WritePatable(void)
{
    /// PATABLE Array
    unsigned char response_get[3]={0};
    paTable[0] = CC1101_PA_TABLE0|BURST_DATA ;

    /// Chip select is made low

   	chip_select_low();

   	/// Wait for MISO pin to go low

   	so_to_go_low();

   	/// Send data on SPI

   	R_CSI00_Start();
   	delay();
   	R_CSI00_Send_Receive(&paTable,three,&response_get);
   	while((temp_my_data.trnas_comleted==FALSE) && (temp_my_data.reception_completed==FALSE));
   	temp_my_data.trnas_comleted=FALSE;
   	temp_my_data.reception_completed=FALSE;
   	R_CSI00_Stop();
   	delay();

}

void load_FIFO(void)

{
	unsigned char response_3[6] = {0};

	create_packet(tx_buff);

	delay();

	/// Chip select is made low

	chip_select_low();

	/// Wait for MISO pin to go low

	so_to_go_low();

	/// Send data on SPI

	R_CSI00_Start();
	delay();
	R_CSI00_Send_Receive(&tx_buff,(tx_buff[1]),&response_3);
	while((temp_my_data.trnas_comleted==FALSE) && (temp_my_data.reception_completed==FALSE));
	temp_my_data.trnas_comleted=FALSE;
	temp_my_data.reception_completed=FALSE;
	R_CSI00_Stop();
	delay();
	/// Wait for module response

	for(z=0;z<=200;z++)
	{
		delay();
	}


}

void create_packet(uint8_t tx_buff[])

{
	unsigned char p;
	tx_buff[0]=(brust_data|WRITE_STROBE|CC1101_FIFO);
	tx_buff[1]=PKTLEN;
	tx_buff[2]=0x02;
    for(p = 3; p < (PKTLEN + 1); p++)
	{
    	tx_buff[p] = (uint8_t)your_gate;
	}

}

	/* End user code. Do not edit comment generated here */

1.step one reset chip. following response i got.

2.sending ideal command.

3 . configuring all register and reading back its value its fine. what i has wrote the same i am reading back.

4.writing PA table.

5. i now want load FIFO but i am unable to load FIFO.

how to solve this problem. please help.

over 7 years ago

0 Siri over 7 years ago

TI__Guru* 87761 points

You need to provide more details about your problem if we shall be able to help you.

How do you know that the writing to the FIFO fails?

Is it because the TXBYTES register does not change?

Because you do not get the wanted interrupts when transmitting?

Because you do not receive what you are sending?

You are not showing your CSn line but I assume that you have this connected?

Are you using our boards for testing or have you made your own?

What register settings are you using?

I looked at your code, and there are several thing I do not understand.

Why do you strobe STX twice and why do you flush the TX FIFO after a delay (Do you know that your packet has been sent at this point?)

The proper steps to transmit a packet is the following:

Init MCU
Reset Radio (Please do a manual reset as described in the data sheet if yo are not sure that your Power-up ramp-up time is according to spec.
Configure radio with register settings from SmartRF Studio
Write to TX FIFO
Strobe STX
Wait for GDOx to signal that the packet is sent (IOCFGx should be 0x06)
Repeat from 4. to send another packet

Siri

0 vishal sapara over 7 years ago in reply to Siri

Intellectual 640 points

hello siri,

thanks for your replay.

How do you know that the writing to the FIFO fails?

below i has am writing whole sequence with problem.

Is it because the TXBYTES register does not change?

LAST four byte always shows FIFO is empty.

Because you do not get the wanted interrupts when transmitting?

no other interrupt i am using right now has disable watchdog timer interrupt also to avoid any conflict.

Because you do not receive what you are sending?

i has tried to read register configuration value what i has already wrote and same i am able to read back,so its fine .

You are not showing your CSn line but I assume that you have this connected?

i has connected CSn pin and channel 4. on scope is CSn pin.

Are you using our boards for testing or have you made your own?

no, it is my own board what i has made.

What register settings are you using?

i am using SMART RF STUDIO for that and below are settings.

Why do you strobe STX twice and why do you flush the TX FIFO after a delay (Do you know that your packet has been sent at this point?)

i am writing below at end why i has tried to send it twice.

I HAS Follow following step for configuration ,

1. RESETING CHIP

2.MAKING CHIP IN IDEAL STATE

3.CONFIGURING RADIO REGISTER

4.PA table writing

5.sending SFSTXON command

6.giving SNOP command

7.loading FIFO

8.sending STX command

up to third point system working fine i conformed it by reading back register value and same i has able to get back what i has wrote.

4th point i am writing in pa table as shown to you in last image.

in 5th step SFSTXON command and i has received following

in this CH1-CLOCK

CH2-MOSI(uC-MSATER AND CC110L-SLAVE)

CH3-MISO(uC-MSATER AND CC110L-SLAVE)

CH4-CHIP SELECT

from waveform i understood that chip went into FAST TRANSMIT READY MODE(SFSTXON).

but when i has tried to load FIFO in CC110L it is not filling FIFO i has attached waveforms as below.

from this wave forms it shows that chip is in SFSTXON mode which i has already given .but when i try to load FIFO it is always showing me last in four clock signal MISO is 1111 means 15 more bytes available in FIFO and this is not changing even if i am sending data to it on next clocks .

follwing is fifo packet i has made

void create_packet (uint8_t tx_buff[])

{

tx_buff[0]=(CC1101_FIFO); //FIFO single byte access
tx_buff[1]=0x03;
tx_buff[2]=(CC1101_FIFO);
tx_buff[3]=0x03;
tx_buff[4]=(CC1101_FIFO);
tx_buff[5]=0x08;

}

void load_FIFO(void)

{
unsigned char response_3[6] = {0};

create_packet(tx_buff);

/// Chip select is made low

chip_select_low();

/// Wait for MISO pin to go low

so_to_go_low();

/// Send data on SPI

R_CSI00_Start();
delay();
R_CSI00_Send_Receive(&tx_buff,SIX,&response_3);
while((temp_my_data.trnas_comleted==FALSE) && (temp_my_data.reception_completed==FALSE));
temp_my_data.trnas_comleted=FALSE;
temp_my_data.reception_completed=FALSE;
R_CSI00_Stop();
delay();

chip_select_high();

}

then i am giving STX command according to step 8 and i am still getting following response it is not going in STX mode .

when i has tried to send STX again it went to TXFIFO_UNDEFLOW as shown in below figure.

i think that as FIFO is empty so second time SENDING STX command made my chip to go in this mode. so i am sending SFSTX mode to made chip come back in ideal mode.

so my problem is FIFO is not loading.

so how to solve this?

does i am following wrong sequence??

0 Siri over 7 years ago in reply to vishal sapara

TI__Guru* 87761 points

The 4 LSB returned on the MISO line will show 1111b (unless you write more than 64 – 15 = 49 bytes to the TX FIFO (The FIFO has room for 64 bytes), so it is correct that it shows 1111b.

If you are getting an underflow state it means that you have written fewer bytes to the TX FIFO than the length byte indicated.

Please simplify your code, and do not do more than what is really necessary:

Init MCU

Reset Radio

Init Radio

Write to TX FIFO (you are using variable packet length mode, so a packet could be: 5, 1, 2, 3, 4, 5 (5 is the length byte and there is 5 bytes following the length byte)

For debug, you can read the TXBYTES register to see that is returned 6 (6 bytes in the TX FIFO)

Strobe STX

Wait for falling edge on GDO0 (monitor this signal using the scope)

For debug, read TXBYTES again and verify it is 0.

Remember that TXBYTES is a status register that requires that the burst bit is set when being accessed.

Siri

0 vishal sapara over 7 years ago in reply to Siri

Intellectual 640 points

Hello.. Siri thanks for your reply,
One more query for FIFO I am using variable packet length format the packet which I has made is as below
tx_buff[0]=(CC1101_FIFO); //FIFO single byte access
tx_buff[1]=0x03;
tx_buff[2]=(CC1101_FIFO);
tx_buff[3]=0x03;
tx_buff[4]=(CC1101_FIFO);
tx_buff[5]=0x08;

Is it correct????
Or
How to make a packet
First I need to send address of TX FIFO 0x3F or 0x7F based on single or brust access.
So right now I am making packet as below

tx_buff[0]=(CC1101_FIFO); //FIFO single byte access
tx_buff[1]=0x03 // data
tx_buff[2]=(CC1101_FIFO);////FIFO single byte acess
tx_buff[3]=0x03; ///data
tx_buff[4]=(CC1101_FIFO);///FIFO single byte acess
tx_buff[5]=0x08;

Or it has it has to be like that
0x7F,0x05,0x02,0x03,0x05,0x06,0x04
So what should be FIFO lengtht
It should be six or seven?

and one question other question sending STX command storbe why it remain in to SFSTXON mode why it is not going in transmit mode??

0 vishal sapara over 7 years ago in reply to vishal sapara

Intellectual 640 points

hello siri,

i tried to wrote 8 data in transmit FIFO read back same by TXBYTES command as shown below.

now i has issue STX strobe to it and i get following response.

what i am getting is SFSTXON as response ,so i why it is not going in transmit mode even after giving STX strobes and my TX -FIFO has already filled ??

0 Siri over 7 years ago in reply to vishal sapara

TI__Guru* 87761 points

There is nothing wrong with your plots or the way the radio behaves.

You write 8 bytes to the TX FIFO and when you read back the TXBYTES register, the MISO line shows 0x08.

Your device is in SFSTXON state, and you send a STX strobe (0x35). The MISO line then reports 0x3F, which means that CHIP_RDYn is low, STATE is 011b (FSTXON) and there are more than 15 free bytes in the TX FIFO.
the STX strobe command will not be executed before the complete command (all 8 bits) are sent on the MOSI line, so the status you read back will not show 010b (TX). If you want to read back TX state, you can transmit several SNOP command after the STX strobe, and see how STATE changes to TX (010b) and then finally to IDLE (000b).

Siri

0 vishal sapara over 7 years ago in reply to Siri

Intellectual 640 points

case CC_STX:
///write send
send_commnad_strobe(CC1101_STX);
do
{
send_commnad_strobe(CC1101_SNOP);
}while((response & MASK_LOWER_NIBBLE)!=0x20);
break;
}

is it ok??????????

0 vishal sapara over 7 years ago in reply to vishal sapara

Intellectual 640 points

SIRI ,
now my problem is when i has sent STX command and waited to mode to be seen on MISO pin then what i found is on immediate next clock SNOP radio went in ideal mode .whay it is so????

0 vishal sapara over 7 years ago

Intellectual 640 points

Part Number: CC110L

HELLO, SIRI

I DID NOT GET ANSWER OF MY QUESTION YET.

0 vishal sapara over 7 years ago

Intellectual 640 points

HERE IS LINK OF PREVIOUS CONVERSATION

e2e.ti.com/.../2976145

0 vishal sapara over 7 years ago in reply to Siri

Intellectual 640 points

GOD0 remain always zero

0 Siri over 7 years ago in reply to vishal sapara

TI__Guru* 87761 points

I will make some spi plots to show how it look s like on my side, but right now we have problems with the IAR lisence.

I will get beack to you when that is up and runnign again.

Please note that writing in capital letters DOES NOT improve the response time.

Siri

0 vishal sapara over 7 years ago in reply to Siri

Intellectual 640 points

ok ..siri

i am coping my question here from that post .

i am working CC110L .

i has wrote FIFO in TXFIFO register. when i read back it is showing me what it has tried to read back.

then issue STX command. and i am waiting for STX command to be executed but the strange thing i found that radio is not going to execute STX command and when i read back the byte 1 data is still there in TXFIFO so why one data always remain in FIFO .

below is code snap shot

loading FIFO and read-back is ok. sending STX command and waiting for entering in transmit mode is not there due to one data is always there in TxFIFO .

below is waveform of what i am receiving when i send TXBYTE read command.

ch1.clock

ch2.MOSI

CH3.MISO

CH4.CSn pin

how to solve this problem.????

regards,

vishal

0 Siri over 7 years ago in reply to vishal sapara

TI__Guru* 87761 points

Please see the attachment.

CC110L.docx

Please try to do the same exercise as I have described in the attached document.

Siri

0 vishal sapara over 7 years ago in reply to Siri

Intellectual 640 points

i will check and come back to you.

0 vishal sapara over 7 years ago in reply to vishal sapara

Intellectual 640 points

GOD0 will continue to give pulses as (clock output/192 ) on reset and as soon as i configure and give command
radio_reg_configure(CC1101_IOCFG0,SMARTRF_SETTING_IOCFG0);
it wii be zero?????
when it become 1??

0 vishal sapara over 7 years ago in reply to vishal sapara

Intellectual 640 points

because i has right now done all step you told me after loding FIFO when i read back the FIFO it shows me 8 because i has wrote 7 data byte and one lenght byte. now before issue of STX command i again red back FIFO it show me 8 SO IT IS FINE .now when i issue STX command and then i try to read FIFO it show me always 1 and also GOD0 is always zero not 1.

0 Siri over 7 years ago in reply to vishal sapara

TI__Guru* 87761 points

First of all, your setting shows a data rate of 1.2 kbps, meaning it takes more than 53 ms from you send your strobe (STX until the GDO0 signal should go high).
The GDO signal should be configured as IOCFG0 = 0x06.
Also, your should set TXOFF_MODE to IDLE and not TX (as you do in your settings).
I am also not sure you are writing a correct packet to your FIFO:

tx_buff[0]=(brust_data|WRITE_STROBE|CC1101_FIFO);
tx_buff[1]=PKTLEN;
tx_buff[2]=0x02;
for(p = 3; p < (PKTLEN + 1); p++)
{
tx_buff[p] = (uint8_t)your_gate;
}

If PKTLEN = 7 you txBuff will be: ADDR, 7, 2, x, x, x, x, x, meaning you are writing 1 byte to little to the TX FIFO.

Do you have the possibility to look at more data at once (the whole sequence)?

SIri

0 vishal sapara over 7 years ago in reply to Siri

Intellectual 640 points

Siri, the earlier I has send to code with above mentioned format but after your suggestion I has changed it bit

0 vishal sapara over 7 years ago in reply to vishal sapara

Intellectual 640 points

first i am sending you my code fifo writing

case CC_LOAD_FIFO:
///loading FIFO
send_commnad_strobe(0x7F);
load_FIFO();
radio_reg_READ(CC1101_TXBYTES_read);
cc_state_assign=CC_STX_GET;
break;

void load_FIFO(void)

{
unsigned char response_3[7] = {0};
create_packet(tx_buff);
/// Chip select is made low
chip_select_low();
/// Wait for MISO pin to go low
so_to_go_low();
/// Send data on SPI
R_CSI00_Start();
delay();
R_CSI00_Send_Receive(&tx_buff,8,&response_3);
while((temp_my_data.trnas_comleted==FALSE) && (temp_my_data.reception_completed==FALSE));
temp_my_data.trnas_comleted=FALSE;
temp_my_data.reception_completed=FALSE;
R_CSI00_Stop();
delay();
/// Wait for module response
for(z=0;z<=200;z++)
{
delay();
}
chip_select_high();
}

void create_packet(uint8_t tx_buff[])

{
unsigned char i;
tx_buff[0] = PKTLEN; // Length byte
tx_buff[1] =0x01;
tx_buff[2] = 0x20;
// Fill rest of buffer with random bytes
for(i = 3; i < (PKTLEN + 1); i++)
{
tx_buff[i] = (uint8_t)your_gate;
}
}

this is code what i have changed after your suggestion.

regards,
vishal.

0 vishal sapara over 7 years ago in reply to vishal sapara

Intellectual 640 points

Fullscreen 8168.r_main.c Download

/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws. 
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability 
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the 
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2011, 2018 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/

/***********************************************************************************************************************
* File Name    : r_main.c
* Version      : CodeGenerator for RL78/G12 V2.04.02.04 [18 May 2018]
* Device(s)    : R5F1026A
* Tool-Chain   : CCRL
* Description  : This file implements main function.
* Creation Date: 24-05-2019
***********************************************************************************************************************/

/***********************************************************************************************************************
Includes
***********************************************************************************************************************/
#include "r_cg_macrodriver.h"
#include "r_cg_cgc.h"
#include "r_cg_port.h"
#include "r_cg_intc.h"
#include "r_cg_serial.h"
/* Start user code for include. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
#include "r_cg_userdefine.h"

/***********************************************************************************************************************
Pragma directive
***********************************************************************************************************************/
/* Start user code for pragma. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */

/***********************************************************************************************************************
Global variables and functions
***********************************************************************************************************************/
/* Start user code for global. Do not edit comment generated here */
void delay(void);
void chip_select_low(void);
void chip_select_high(void);
void so_to_go_low(void);
void send_commnad_strobe(unsigned char);
void configure_cc110l_register(void);
void CC1101_Control_task(void);
void radio_reg_configure(unsigned char,unsigned char);
void whole_configuration(void);
void CC11XX_WritePatable(void);
void create_packet(uint8_t tx_buff[]);
void load_FIFO(void);
void CC1101_Initalization(void);
void radio_reg_READ(unsigned char);
uint8_t response,RESP_SRES_SIDLE=0x0F;
uint8_t z,brust_data=0x40;
uint8_t paTable[3]={0},BURST_DATA=0x40,PKTLEN=0x06,your_gate=0x05;
uint8_t MASK_LOWER_NIBBLE=0xf0,STATE_SFSTX=0x30,WRITE_STROBE=0x00;
uint8_t tx_buff[7],impoetant=0x20;
uint8_t wait,retry_count;
unsigned char my_data=FALSE;
struct my_data
{
unsigned volatile char  trnas_comleted         :1;
unsigned volatile char  reception_completed    :1;
}temp_my_data;
typedef enum cc_state_enum
{
    /// Resets chip
    CC_INIT_RESET,

    /// Configuration of radio
    CC_RADIO_CFG,

	/// Frequency Synthesizing
	CC_SFSTXON_TX,

	/// Get the status byte of the chip
	CC_SNOP_TX,

    /// Load data in FIFO
    CC_LOAD_FIFO,

    /// Transmit the data on Air
    CC_STX_GET,

	/// Transition delay between state change
	CC_WAIT_SEND,

    /// Flush TX FIFO condition
	CC_SFTX_ON
} cc_state_enum;
cc_state_enum cc_state_assign;
/* End user code. Do not edit comment generated here */
void R_MAIN_UserInit(void);

/***********************************************************************************************************************
* Function Name: main
* Description  : This function implements main function.
* Arguments    : None
* Return Value : None
***********************************************************************************************************************/
void main(void)
{
    R_MAIN_UserInit();
    /* Start user code. Do not edit comment generated here */
    /* End user code. Do not edit comment generated here */
}

/***********************************************************************************************************************
* Function Name: R_MAIN_UserInit
* Description  : This function adds user code before implementing main function.
* Arguments    : None
* Return Value : None
***********************************************************************************************************************/
void R_MAIN_UserInit(void)
{
    /* Start user code. Do not edit comment generated here */
	EI();
	CC1101_Initalization();
	while (1)
	{
	 CC1101_Control_task();
	}
    /* End user code. Do not edit comment generated here */
}

/* Start user code for adding. Do not edit comment generated here */

void CC1101_Initalization(void)
{
	 chip_select_high();
	 cc_state_assign=CC_INIT_RESET;
	 temp_my_data.trnas_comleted=FALSE;
	 temp_my_data.reception_completed=FALSE;
}

void CC1101_Control_task(void)
{
	switch(cc_state_assign)
	{
	case CC_INIT_RESET:
		/// Reset CC110L chip
		radio_reg_READ(CC1101_TXBYTES_read);
		send_commnad_strobe(CC1101_SRES);
		if(RESP_SRES_SIDLE==response)
		{
		cc_state_assign=CC_RADIO_CFG;
		}
		break;

	case CC_RADIO_CFG:
		/// Puts the chip in SIDLE
		send_commnad_strobe( CC1101_SIDLE );
		/// Configure Radio chip
		whole_configuration();
		/// Configure PATABLE for gain
		CC11XX_WritePatable();
		radio_reg_configure(0x40,0xC0);
		radio_reg_configure(0x41,0x00);
		cc_state_assign=CC_SFSTXON_TX;
		radio_reg_configure(CC1101_TEST0,SMARTRF_SETTING_TEST0);
		break;

	case CC_SFSTXON_TX:
		///frequency
		send_commnad_strobe(CC1101_SFSTXON);
		cc_state_assign=CC_SNOP_TX;
		break;

	case CC_SNOP_TX:
		///NO OPERATION
		send_commnad_strobe(CC1101_SNOP);
		if((response & MASK_LOWER_NIBBLE)==STATE_SFSTX)
			cc_state_assign=CC_LOAD_FIFO;
		else
		{
			if(++retry_count<=5)
			cc_state_assign=CC_SFSTXON_TX;
			else
			retry_count=0;
			CC1101_Initalization();
		}
		break;

	case CC_LOAD_FIFO:
		///loading FIFO
		send_commnad_strobe(0x7F);
		load_FIFO();
		radio_reg_READ(CC1101_TXBYTES_read);
		cc_state_assign=CC_STX_GET;
		break;

	case CC_STX_GET:
		///write send
		radio_reg_READ(CC1101_TXBYTES_read);
		send_commnad_strobe(CC1101_STX);
		cc_state_assign=CC_WAIT_SEND;
		break;

	case CC_WAIT_SEND:
		///wait for send
		R_INTC0_Stop();
		R_INTC0_Start();
		if(my_data==TRUE)///TRUE ON FALING EDGE OF GOD0
		{
		my_data=FALSE;
		R_INTC0_Stop();
		send_commnad_strobe(CC1101_SNOP);
		radio_reg_READ(CC1101_TXBYTES_read);
		cc_state_assign=CC_SFTX_ON;
		}
		break;

	case CC_SFTX_ON:
		send_commnad_strobe(CC1101_SFTX);
		delay();
		cc_state_assign=CC_INIT_RESET;
		break;

	default:
		break;
	}
}
void delay(void)
{
	unsigned int i;
	for(i=0;i<=250;i++);
}

void chip_select_low(void)
{
	P1=P1 & (~(0x08));
}
void chip_select_high(void)
{
	P1=P1|0x08;
}
void so_to_go_low(void)
{
	while(0x02==(P1 & (0x02)));
}
void send_commnad_strobe(unsigned char command)
{
	 /// Chip select is made low
	chip_select_low();
	/// Wait for MISO pin to go low
	so_to_go_low();
	/// Send data on SPI
	R_CSI00_Start();
	delay();
	R_CSI00_Send_Receive(&command,ONE,&response);
	while((temp_my_data.trnas_comleted==FALSE) && (temp_my_data.reception_completed==FALSE));
	temp_my_data.trnas_comleted=FALSE;
	temp_my_data.reception_completed=FALSE;
	delay();
	/// Wait for module response
	for(z=0;z<=200;z++)
	{
		delay();
		delay();
	}
	R_CSI00_Stop();

}
void radio_reg_configure(unsigned char add,unsigned char valu)
{
	unsigned char radio_register[2],radio_response[2]={0};
	radio_register[0]=(brust_data|add);
	radio_register[1]=valu;
	/// Chip select is made low
	chip_select_low();
	/// Wait for MISO pin to go low
	so_to_go_low();
	/// Send data on SPI
	R_CSI00_Start();
	delay();
	R_CSI00_Send_Receive(&radio_register,TWO,&radio_response);
	while((temp_my_data.trnas_comleted==FALSE) && (temp_my_data.reception_completed==FALSE));
	temp_my_data.trnas_comleted=FALSE;
	temp_my_data.reception_completed=FALSE;
	R_CSI00_Stop();
	delay();
	chip_select_high();

}

void radio_reg_READ(unsigned char add)
{
	unsigned char radio_register[2],radio_response[2]={0};
	radio_register[0]=(brust_data|add);
	radio_register[1]=0x00;
	/// Chip select is made low
	chip_select_low();
	/// Wait for MISO pin to go low
	so_to_go_low();
	/// Send data on SPI
	R_CSI00_Start();
	delay();
	R_CSI00_Send_Receive(&radio_register,TWO,&radio_response);
	while((temp_my_data.trnas_comleted==FALSE) && (temp_my_data.reception_completed==FALSE));
	temp_my_data.trnas_comleted=FALSE;
	temp_my_data.reception_completed=FALSE;
	R_CSI00_Stop();
	delay();
	chip_select_high();

}

void whole_configuration(void)
{
	radio_reg_configure(CC1101_IOCFG0,SMARTRF_SETTING_IOCFG0);
	radio_reg_configure(CC1101_FIFOTHR,SMARTRF_SETTING_FIFOTHR);
	radio_reg_configure(CC1101_PKTCTRL0,SMARTRF_SETTING_PKTCTRL0);
	radio_reg_configure(CC1101_FSCTRL1,SMARTRF_SETTING_FSCTRL1);
	radio_reg_configure(CC1101_FREQ2,SMARTRF_SETTING_FREQ2);
	radio_reg_configure(CC1101_FREQ1,SMARTRF_SETTING_FREQ1);
	radio_reg_configure(CC1101_FREQ0,SMARTRF_SETTING_FREQ0);
	radio_reg_configure(CC1101_MDMCFG4,SMARTRF_SETTING_MDMCFG4);
	radio_reg_configure(CC1101_MDMCFG3,SMARTRF_SETTING_MDMCFG3);
	radio_reg_configure(CC1101_MDMCFG2,SMARTRF_SETTING_MDMCFG2);
	radio_reg_configure(CC1101_MDMCFG1,SMARTRF_SETTING_MDMCFG1);
	radio_reg_configure(CC1101_MDMCFG0,SMARTRF_SETTING_MDMCFG0);
	radio_reg_configure(CC1101_DEVIATN,SMARTRF_SETTING_DEVIATN);
	radio_reg_configure(CC1101_MCSM0,SMARTRF_SETTING_MCSM0);
	radio_reg_configure(CC1101_MCSM1,SMARTRF_SETTING_MCSM1);
	radio_reg_configure(CC1101_FOCCFG,SMARTRF_SETTING_FOCCFG);
	radio_reg_configure(0x20,SMARTRF_SETTING_RESERVED_0X20);
	radio_reg_configure(CC1101_FSCAL3,SMARTRF_SETTING_FSCAL3);
	radio_reg_configure(CC1101_FSCAL2,SMARTRF_SETTING_FSCAL2);
	radio_reg_configure(CC1101_FSCAL1,SMARTRF_SETTING_FSCAL1);
	radio_reg_configure(CC1101_FSCAL0,SMARTRF_SETTING_FSCAL0);
	radio_reg_configure(CC1101_RESED_0x29,SMARTRF_SETTING_RESERVED_0X29);
	radio_reg_configure(CC1101_RESED_0x2A,SMARTRF_SETTING_RESERVED_0X2A);
	radio_reg_configure(CC1101_RESED_0x2B,SMARTRF_SETTING_RESERVED_0X2B);
	radio_reg_configure(CC1101_TEST2,SMARTRF_SETTING_TEST2);
	radio_reg_configure(CC1101_TEST1,SMARTRF_SETTING_TEST1);
 	radio_reg_configure(CC1101_TEST0,SMARTRF_SETTING_TEST0);
	radio_reg_configure(CC1101_VERSION,SMARTRF_SETTING_VERSION);
	radio_reg_configure(CC1101_CRC_REG,SMARTRF_SETTING_CRC_REG);
	radio_reg_configure(CC1101_RSSI,SMARTRF_SETTING_RSSI);
	radio_reg_configure(CC1101_MARCSTATE,SMARTRF_SETTING_MARCSTATE);
	radio_reg_configure(CC1101_pktstatus,SMARTRF_SETTING_PKTSTATUS);
}

void CC11XX_WritePatable(void)
{
    /// PATABLE Array
    unsigned char response_get[3]={0};
    paTable[0] = CC1101_PA_TABLE0|BURST_DATA;
    /// Chip select is made low
   	chip_select_low();
   	/// Wait for MISO pin to go low
   	so_to_go_low();
   	/// Send data on SPI
   	R_CSI00_Start();
   	delay();
   	R_CSI00_Send_Receive(&paTable,three,&response_get);
   	while((temp_my_data.trnas_comleted==FALSE) && (temp_my_data.reception_completed==FALSE));
   	temp_my_data.trnas_comleted=FALSE;
   	temp_my_data.reception_completed=FALSE;
   	R_CSI00_Stop();
   	delay();
   	chip_select_high();
}

void load_FIFO(void)

{
	unsigned char response_3[7] = {0};
	create_packet(tx_buff);
	/// Chip select is made low
	chip_select_low();
	/// Wait for MISO pin to go low
	so_to_go_low();
	/// Send data on SPI
	R_CSI00_Start();
	delay();
	R_CSI00_Send_Receive(&tx_buff,8,&response_3);
	while((temp_my_data.trnas_comleted==FALSE) && (temp_my_data.reception_completed==FALSE));
	temp_my_data.trnas_comleted=FALSE;
	temp_my_data.reception_completed=FALSE;
	R_CSI00_Stop();
	delay();
	/// Wait for module response
	for(z=0;z<=200;z++)
	{
		delay();
	}
	chip_select_high();
}

void create_packet(uint8_t tx_buff[])

{
		unsigned char i;
		tx_buff[0] = PKTLEN;                           // Length byte
		tx_buff[1] =0x01;
		tx_buff[2] = 0x20;
	    // Fill rest of buffer with random bytes
	    for(i = 3; i < (PKTLEN + 1); i++)
	    {
	    	tx_buff[i] = (uint8_t)your_gate;
	    }
}
	/* End user code. Do not edit comment generated here */

please review it and send your feedback.

0 vishal sapara over 7 years ago in reply to vishal sapara

Intellectual 640 points

hello siri,

thanks for your response .

i am here attaching whole code and smart RF studio settings which i has imported

here is my code file.

Fullscreen 2235.r_main.c Download

/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws. 
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability 
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the 
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2011, 2018 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/

/***********************************************************************************************************************
* File Name    : r_main.c
* Version      : CodeGenerator for RL78/G12 V2.04.02.04 [18 May 2018]
* Device(s)    : R5F1026A
* Tool-Chain   : CCRL
* Description  : This file implements main function.
* Creation Date: 24-05-2019
***********************************************************************************************************************/

/***********************************************************************************************************************
Includes
***********************************************************************************************************************/
#include "r_cg_macrodriver.h"
#include "r_cg_cgc.h"
#include "r_cg_port.h"
#include "r_cg_intc.h"
#include "r_cg_serial.h"
/* Start user code for include. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
#include "r_cg_userdefine.h"

/***********************************************************************************************************************
Pragma directive
***********************************************************************************************************************/
/* Start user code for pragma. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */

/***********************************************************************************************************************
Global variables and functions
***********************************************************************************************************************/
/* Start user code for global. Do not edit comment generated here */
void delay(void);
void chip_select_low(void);
void chip_select_high(void);
void so_to_go_low(void);
void send_commnad_strobe(unsigned char);
void configure_cc110l_register(void);
void CC1101_Control_task(void);
void radio_reg_configure(unsigned char,unsigned char);
void whole_configuration(void);
void CC11XX_WritePatable(void);
void create_packet(uint8_t tx_buff[]);
void load_FIFO(void);
void CC1101_Initalization(void);
void radio_reg_READ(unsigned char);
uint8_t response,RESP_SRES_SIDLE=0x0F;
uint8_t z,brust_data=0x40;
uint8_t paTable[3]={0},BURST_DATA=0x40,PKTLEN=0x06,your_gate=0x05;
uint8_t MASK_LOWER_NIBBLE=0xf0,STATE_SFSTX=0x30,WRITE_STROBE=0x00;
uint8_t tx_buff[7],impoetant=0x20;
uint8_t wait,retry_count;
unsigned char my_data=FALSE;
struct my_data
{
unsigned volatile char  trnas_comleted         :1;
unsigned volatile char  reception_completed    :1;
}temp_my_data;
typedef enum cc_state_enum
{
    /// Resets chip
    CC_INIT_RESET,

    /// Configuration of radio
    CC_RADIO_CFG,

	/// Frequency Synthesizing
	CC_SFSTXON_TX,

	/// Get the status byte of the chip
	CC_SNOP_TX,

    /// Load data in FIFO
    CC_LOAD_FIFO,

    /// Transmit the data on Air
    CC_STX_GET,

	/// Transition delay between state change
	CC_WAIT_SEND,

    /// Flush TX FIFO condition
	CC_SFTX_ON
} cc_state_enum;
cc_state_enum cc_state_assign;
/* End user code. Do not edit comment generated here */
void R_MAIN_UserInit(void);

/***********************************************************************************************************************
* Function Name: main
* Description  : This function implements main function.
* Arguments    : None
* Return Value : None
***********************************************************************************************************************/
void main(void)
{
    R_MAIN_UserInit();
    /* Start user code. Do not edit comment generated here */
    /* End user code. Do not edit comment generated here */
}

/***********************************************************************************************************************
* Function Name: R_MAIN_UserInit
* Description  : This function adds user code before implementing main function.
* Arguments    : None
* Return Value : None
***********************************************************************************************************************/
void R_MAIN_UserInit(void)
{
    /* Start user code. Do not edit comment generated here */
	EI();
	CC1101_Initalization();
	while (1)
	{
	 CC1101_Control_task();
	}
    /* End user code. Do not edit comment generated here */
}

/* Start user code for adding. Do not edit comment generated here */

void CC1101_Initalization(void)
{
	 chip_select_high();
	 cc_state_assign=CC_INIT_RESET;
	 temp_my_data.trnas_comleted=FALSE;
	 temp_my_data.reception_completed=FALSE;
}

void CC1101_Control_task(void)
{
	switch(cc_state_assign)
	{
	case CC_INIT_RESET:
		/// Reset CC110L chip
		radio_reg_READ(CC1101_TXBYTES_read);
		send_commnad_strobe(CC1101_SRES);
		if(RESP_SRES_SIDLE==response)
		{
		cc_state_assign=CC_RADIO_CFG;
		}
		break;

	case CC_RADIO_CFG:
		/// Puts the chip in SIDLE
		send_commnad_strobe( CC1101_SIDLE );
		/// Configure Radio chip
		whole_configuration();
		/// Configure PATABLE for gain
		CC11XX_WritePatable();
		radio_reg_configure(0x40,0xC0);
		radio_reg_configure(0x41,0x00);
		cc_state_assign=CC_SFSTXON_TX;
		radio_reg_configure(CC1101_TEST0,SMARTRF_SETTING_TEST0);
		break;

	case CC_SFSTXON_TX:
		///frequency
		send_commnad_strobe(CC1101_SFSTXON);
		cc_state_assign=CC_SNOP_TX;
		break;

	case CC_SNOP_TX:
		///NO OPERATION
		send_commnad_strobe(CC1101_SNOP);
		if((response & MASK_LOWER_NIBBLE)==STATE_SFSTX)
			cc_state_assign=CC_LOAD_FIFO;
		else
		{
			if(++retry_count<=5)
			cc_state_assign=CC_SFSTXON_TX;
			else
			retry_count=0;
			CC1101_Initalization();
		}
		break;

	case CC_LOAD_FIFO:
		///loading FIFO
		send_commnad_strobe(0x7F);
		load_FIFO();
		radio_reg_READ(CC1101_TXBYTES_read);
		cc_state_assign=CC_STX_GET;
		break;

	case CC_STX_GET:
		///write send
		radio_reg_READ(CC1101_TXBYTES_read);
		send_commnad_strobe(CC1101_STX);
		cc_state_assign=CC_WAIT_SEND;
		break;

	case CC_WAIT_SEND:
		///wait for send
		R_INTC0_Stop();
		R_INTC0_Start();
		if(my_data==TRUE)///TRUE ON FALING EDGE OF GOD0
		{
		my_data=FALSE;
		R_INTC0_Stop();
		send_commnad_strobe(CC1101_SNOP);
		radio_reg_READ(CC1101_TXBYTES_read);
		cc_state_assign=CC_SFTX_ON;
		}
		break;

	case CC_SFTX_ON:
		send_commnad_strobe(CC1101_SFTX);
		delay();
		cc_state_assign=CC_INIT_RESET;
		break;

	default:
		break;
	}
}
void delay(void)
{
	unsigned int i;
	for(i=0;i<=250;i++);
}

void chip_select_low(void)
{
	P1=P1 & (~(0x08));
}
void chip_select_high(void)
{
	P1=P1|0x08;
}
void so_to_go_low(void)
{
	while(0x02==(P1 & (0x02)));
}
void send_commnad_strobe(unsigned char command)
{
	 /// Chip select is made low
	chip_select_low();
	/// Wait for MISO pin to go low
	so_to_go_low();
	/// Send data on SPI
	R_CSI00_Start();
	delay();
	R_CSI00_Send_Receive(&command,ONE,&response);
	while((temp_my_data.trnas_comleted==FALSE) && (temp_my_data.reception_completed==FALSE));
	temp_my_data.trnas_comleted=FALSE;
	temp_my_data.reception_completed=FALSE;
	delay();
	/// Wait for module response
	for(z=0;z<=200;z++)
	{
		delay();
		delay();
	}
	R_CSI00_Stop();

}
void radio_reg_configure(unsigned char add,unsigned char valu)
{
	unsigned char radio_register[2],radio_response[2]={0};
	radio_register[0]=(brust_data|add);
	radio_register[1]=valu;
	/// Chip select is made low
	chip_select_low();
	/// Wait for MISO pin to go low
	so_to_go_low();
	/// Send data on SPI
	R_CSI00_Start();
	delay();
	R_CSI00_Send_Receive(&radio_register,TWO,&radio_response);
	while((temp_my_data.trnas_comleted==FALSE) && (temp_my_data.reception_completed==FALSE));
	temp_my_data.trnas_comleted=FALSE;
	temp_my_data.reception_completed=FALSE;
	R_CSI00_Stop();
	delay();
	chip_select_high();

}

void radio_reg_READ(unsigned char add)
{
	unsigned char radio_register[2],radio_response[2]={0};
	radio_register[0]=(brust_data|add);
	radio_register[1]=0x00;
	/// Chip select is made low
	chip_select_low();
	/// Wait for MISO pin to go low
	so_to_go_low();
	/// Send data on SPI
	R_CSI00_Start();
	delay();
	R_CSI00_Send_Receive(&radio_register,TWO,&radio_response);
	while((temp_my_data.trnas_comleted==FALSE) && (temp_my_data.reception_completed==FALSE));
	temp_my_data.trnas_comleted=FALSE;
	temp_my_data.reception_completed=FALSE;
	R_CSI00_Stop();
	delay();
	chip_select_high();

}

void whole_configuration(void)
{
	radio_reg_configure(CC1101_IOCFG0,SMARTRF_SETTING_IOCFG0);
	radio_reg_configure(CC1101_FIFOTHR,SMARTRF_SETTING_FIFOTHR);
	radio_reg_configure(CC1101_PKTCTRL0,SMARTRF_SETTING_PKTCTRL0);
	radio_reg_configure(CC1101_FSCTRL1,SMARTRF_SETTING_FSCTRL1);
	radio_reg_configure(CC1101_FREQ2,SMARTRF_SETTING_FREQ2);
	radio_reg_configure(CC1101_FREQ1,SMARTRF_SETTING_FREQ1);
	radio_reg_configure(CC1101_FREQ0,SMARTRF_SETTING_FREQ0);
	radio_reg_configure(CC1101_MDMCFG4,SMARTRF_SETTING_MDMCFG4);
	radio_reg_configure(CC1101_MDMCFG3,SMARTRF_SETTING_MDMCFG3);
	radio_reg_configure(CC1101_MDMCFG2,SMARTRF_SETTING_MDMCFG2);
	radio_reg_configure(CC1101_MDMCFG1,SMARTRF_SETTING_MDMCFG1);
	radio_reg_configure(CC1101_MDMCFG0,SMARTRF_SETTING_MDMCFG0);
	radio_reg_configure(CC1101_DEVIATN,SMARTRF_SETTING_DEVIATN);
	radio_reg_configure(CC1101_MCSM0,SMARTRF_SETTING_MCSM0);
	radio_reg_configure(CC1101_MCSM1,SMARTRF_SETTING_MCSM1);
	radio_reg_configure(CC1101_FOCCFG,SMARTRF_SETTING_FOCCFG);
	radio_reg_configure(0x20,SMARTRF_SETTING_RESERVED_0X20);
	radio_reg_configure(CC1101_FSCAL3,SMARTRF_SETTING_FSCAL3);
	radio_reg_configure(CC1101_FSCAL2,SMARTRF_SETTING_FSCAL2);
	radio_reg_configure(CC1101_FSCAL1,SMARTRF_SETTING_FSCAL1);
	radio_reg_configure(CC1101_FSCAL0,SMARTRF_SETTING_FSCAL0);
	radio_reg_configure(CC1101_RESED_0x29,SMARTRF_SETTING_RESERVED_0X29);
	radio_reg_configure(CC1101_RESED_0x2A,SMARTRF_SETTING_RESERVED_0X2A);
	radio_reg_configure(CC1101_RESED_0x2B,SMARTRF_SETTING_RESERVED_0X2B);
	radio_reg_configure(CC1101_TEST2,SMARTRF_SETTING_TEST2);
	radio_reg_configure(CC1101_TEST1,SMARTRF_SETTING_TEST1);
 	radio_reg_configure(CC1101_TEST0,SMARTRF_SETTING_TEST0);
	radio_reg_configure(CC1101_VERSION,SMARTRF_SETTING_VERSION);
	radio_reg_configure(CC1101_CRC_REG,SMARTRF_SETTING_CRC_REG);
	radio_reg_configure(CC1101_RSSI,SMARTRF_SETTING_RSSI);
	radio_reg_configure(CC1101_MARCSTATE,SMARTRF_SETTING_MARCSTATE);
	radio_reg_configure(CC1101_pktstatus,SMARTRF_SETTING_PKTSTATUS);
}

void CC11XX_WritePatable(void)
{
    /// PATABLE Array
    unsigned char response_get[3]={0};
    paTable[0] = CC1101_PA_TABLE0|BURST_DATA;
    /// Chip select is made low
   	chip_select_low();
   	/// Wait for MISO pin to go low
   	so_to_go_low();
   	/// Send data on SPI
   	R_CSI00_Start();
   	delay();
   	R_CSI00_Send_Receive(&paTable,three,&response_get);
   	while((temp_my_data.trnas_comleted==FALSE) && (temp_my_data.reception_completed==FALSE));
   	temp_my_data.trnas_comleted=FALSE;
   	temp_my_data.reception_completed=FALSE;
   	R_CSI00_Stop();
   	delay();
   	chip_select_high();
}

void load_FIFO(void)

{
	unsigned char response_3[7] = {0};
	create_packet(tx_buff);
	/// Chip select is made low
	chip_select_low();
	/// Wait for MISO pin to go low
	so_to_go_low();
	/// Send data on SPI
	R_CSI00_Start();
	delay();
	R_CSI00_Send_Receive(&tx_buff,8,&response_3);
	while((temp_my_data.trnas_comleted==FALSE) && (temp_my_data.reception_completed==FALSE));
	temp_my_data.trnas_comleted=FALSE;
	temp_my_data.reception_completed=FALSE;
	R_CSI00_Stop();
	delay();
	/// Wait for module response
	for(z=0;z<=200;z++)
	{
		delay();
	}
	chip_select_high();
}

void create_packet(uint8_t tx_buff[])

{
		unsigned char i;
		tx_buff[0] = PKTLEN;                           // Length byte
		tx_buff[1] =0x01;
		tx_buff[2] = 0x20;
	    // Fill rest of buffer with random bytes
	    for(i = 3; i < (PKTLEN + 1); i++)
	    {
	    	tx_buff[i] = (uint8_t)your_gate;
	    }
}
	/* End user code. Do not edit comment generated here */

please review it and give your valuable feedback so that i can improve what i am missing right now.

and also i am attaching here snap shot of setting file

and here is what i am sending by code

please give your feedback

regards,

vishal

0 vishal sapara over 7 years ago in reply to vishal sapara

Intellectual 640 points

hello siri,

i has modified above code which i has sent you before three day that is why i am updating snap shot of updated code here.

i has done what you told in earlier conversation. below is snap shot of step of my code. for fifo writing

load_FIFO();
radio_reg_READ(CC1101_TXBYTES_read);
cc_state_assign=CC_STX_GET;
break;

load FIFO function is as below

and create packet is

in above case PATLEN=8 and bufffer size is total 9 including address when i has tried to read back same i got following as response.

CH1.CLOCK CH2.MOSI CH3.MISO CH4.CHIP SELECT

i got MISO =0x08 ..means what i has tried to wrote that is being actually in TXFIFO .. now i am doing following

giving STX command and i got following as response

chip is in SFTXON mode at time of issuing STX but now when i am sending again read commnd after issue of STX i got following

I did not understand why it is going in TXFIFO_UNDEFLOW mode when issuing read command after STX where before STX it is giving me correct response.

0 Siri over 7 years ago in reply to vishal sapara

TI__Guru* 87761 points

You are not writing the correct numbers of bytes to the FIFO (your payload length does not correspond to your length byte:

void create_packet(uint8_t tx_buff[])
{
    unsigned char i;
    tx_buff[0] = 0x7F;
    tx_buff[1] = PKTLEN;
    tx_buff[2] = 0x01;
    tx_buff[3] = 0x20;

    //Fill rest of buffer with random bytes
    for(i = 4; i < (PKTLEN + 1); i++)
    {
        tx_buff[i] = (uint8_t)your_gate;
    }
}

The code above will give you a tx_buff that looks like this:

0: 0x7F // Address of TX FIFO

1: 0x08 // Length byte (tells the radio there will be 8 more payload bytes)

2: 0x01 // Payload byte 1

3: 0x20 // Payload byte 2

4: rand // Payload byte 3

5: rand // Payload byte 4

6: rand // Payload byte 5

7: rand // Payload byte 6

8: rand // Payload byte 7

You use a length byte of 8 and then you only write 7 more bytes to the TX FIFO. The length byte tells the radio how many bytes is following the length byte.

When you use a length byte of 8, you need to write a total of 9 bytes to the TX FIFO (and TXBYTES should show 9). The 0x7F that is in tx_buff[0] is NOT written to the FIFO (this is the FIFO address).

Siri

0 vishal sapara over 7 years ago in reply to Siri

Intellectual 640 points

thank you siri for your reply,

above code is ok???

0 vishal sapara over 7 years ago in reply to vishal sapara

Intellectual 640 points

hello siri, after changing code i got following as response on CH3.MOSI this result is what i get after first read and below is reading sequence and waveforms.

Which shows i has wrote 9 bytes wrote in FIFO . now i issue STX command and then i issue read command again it shows me as below as response.

i got above CH3.MOSI as shown why it is zero even after i am immediately reading data after STX and then after i i give SNOP COMMAND it shows me IDEAL mode.

regards,

vishal.

0 vishal sapara over 7 years ago in reply to vishal sapara

Intellectual 640 points

hello sir,

one doubt i am writing PA table as below please give your suggestion whether it is ok or not i am using GFSK modulation.

is it ok??

0 vishal sapara over 7 years ago in reply to vishal sapara

Intellectual 640 points

hello siri,

i am observing my data on spectrum analyzer on PC .

and i got following as my response.

i am not sure is it correct????

if it is correct then how will i know that what i has transmitted that is being received or it is preamble bytes only??

regards,

vishal

0 vishal sapara over 7 years ago in reply to vishal sapara

Intellectual 640 points

if i want to receive this data on SMART RF STUDIO then with CC debugger in PACKET RECEIVE MODE then does i need to change my packet format.??

0 vishal sapara over 7 years ago in reply to vishal sapara

Intellectual 640 points

hello siri,

now i am able to received packet but i am getting CRC error.

regards,

vishal.

0 Siri over 7 years ago in reply to vishal sapara

TI__Guru* 87761 points

To communicate with SmartRF Studio, you shouldfind the setting you want to use (one of the default settings in SmartRF Studio9. Then you should use the code export feature to copy these settings into your code. Default is Studio is that you are using variable packet length mode.
From the Studio plot above, it might look like you are using fixed packet length in Studio and are receiving 9 bytes (PKTLEN = 9) for each packet?

Siri

0 vishal sapara over 7 years ago in reply to Siri

Intellectual 640 points

Hello,
Siri I am not able to understand that I am sending the data and correct data being received still it is showing me CRC error what could be possible cause for that?

0 vishal sapara over 7 years ago in reply to Siri

Intellectual 640 points

I am not able to understand siri I has specified variable packet length in my code and this is same what I has imported from smart RF studio register export.

0 vishal sapara over 7 years ago in reply to vishal sapara

Intellectual 640 points

hello,siri

i right now i am able to receive correct packet by my transmitter .thanks for your all support and your document .here i am attaching correct packet snapshot and i am marking issue as resolved and pointing some things below this snap shot which has solved my issue

1. first i was doing wrong packet format and when you suggested the correct format and when i read back i am able to read back correct data.

2. i am writing wrong PA table this also i has modified first address of PA table and then two data bytes based on power requirement.

3. current at each transfer increase then back to nominal after transfer of that data this hint me that my transmitter is transmitting but CC debugger is not receiving.

4.when i has used CC debugger as transmitter and tried to plot frequency on MSP-SA430-sub 1 Ghz ,i found that it is transmitting at 867Mhz. and when i am using my transmitter then i found on MSP-SA430 spectrum analyzer and i found that it is transmitting at 867.20 Mhz .. what i have done is 867.20-867.0 =0.20Mhz ,i has subtracted this from 867-0.20=866.70Mhz..and this register setting for 866.70 from smart RF studio i has dumped in my code so my spectrum shift from 867.20 to 867.Mhz so i am able to receive packet on receiverv end.

thank you very much again for your support

Regads,

vishal.

Sub-1 GHz

Sub-1 GHz forum

CC110L: RENASAS MICRO