Porting to platforms that use DMA for SPI transfers

Hi Christopher, 

The CC3000 is capable of transmitting up to 1468 bytes. 

Pedro 

Pedro,

You appear to have answered a question I didn't ask.

I am talking about the SPI connection between the C3000 and host processor. I am using a target platform that has a host processor that can support DMA SPI transfers. Both the Wiki example and other project examples of implementations using DMA have a cryptic reference to limitations of the LM3S9B96 which prevent DMA transfers of over 1024 bytes. What I want to know is if this limitation is there because of the platform these examples where written for or if it is a limitation of the CC3000 as well.

My current target is capable of supporting DMA transfers up to the maximum buffer size recommended by TI (1700 bytes). It would simplify the code if I could eliminate the need to break large transfers into two smaller ones as is done in the existing example projects. I just need to know that this will not pose any issue for the CC3000.

Best regards.

Hi Christopher, 

Yes that is a limitation of the LM3S9B96, when I mentioned the transmission buffer size, I was implying that the CC3000 can only take from the host up to 1468 bytes + headers. You will no be able to do a 1700 bytes DMA transfer to the CC3000. 

Pedro 

Pedro,

You appear to be answering more questions I never asked.

Let me try again. Can the CC3000 accept SPI transfers in excess of 1024 bytes without having to break them up into two transfer sessions? It was not clear from the examples if the 1024 limitation described was there because of the target platform the code was written for or a limitation of the processor embedded within the CC3000 chip.

BTW,  why does TI recommend buffer sizes of 1700 bytes for use with the Driver Library if it will never exchange messages with the CC3000 of that size. Seems like TI is encouraging people to needlessly allocate RAM; usually a precious resource in an embedded system.

From TI's wiki:

IAR issues warning while compiling SPI Driver project

Issue: While compiling the SPI Driver that is part of the IAR workspace, IAR issues a warning indicating buffers are only 100 bytes instead of 1700.

Explanation:

The buffers are recommended to be 1700 bytes large. However, because of the extreme space constraints of the MSP430FR5739 and the fact that little information is sent (8 bytes), the buffers were reduced to give more space to code.

Affects:

All CC3000 Sensor Application versions

Workaround:

None. It is possible to suppress this warning by deleting the #warning flag. However, TI recommends to use 1700 byte buffers whenever possible to ensure maximum throughput and best reliability in your
particular application.

What should the buffer sizes be?

I see, in the recent host driver and service pack we are now restricted to 1468 (http://processors.wiki.ti.com/index.php/CC3000_Host_Programming_Guide#TX_and_RX_buffers) 

Pedro 

Thanks for the link. However, you appear to be confusing payload size with buffer size. Per this link you provided the buffers should be 1468 + 42 or 1510 bytes long.

I give up on getting an answer to my original question.

Alon,

1. I already verified this was the case with the SPI driver I wrote. Thanks for confirming.

2. Regarding the SPI buffer size, I simply wanted to know the recommended buffer size I needed to allocate to support the most efficient SPI transfers between the CC3000 and the host processor using the driver library. Notes on the Wiki and some of the sample code I downloaded from the TI website led me to believe it was 1700. The link Pedro provided suggested the maximum useful SPI RX/TX buffer sizes are 1510 (1468 + 42) bytes. I never asked about the payload size, so I'm not quite sure why it kept popping up in the responses.

Interestingly enough, the maximum recommended SPI buffer sizes in the latest CC3000+FRAM WiFi Sensor Application (v1.9) is shown as 1520 bytes; which appears to be about 10 bytes larger than the link Pedro provided indicates they should have to be.

#define CC3000_MINIMAL_RX_SIZE      (118 + 1)
#define CC3000_MAXIMAL_RX_SIZE      (1519 + 1)

.

// The calculation for the actual size of buffer for transmission is:
// Given the maximal data size MAX_DATA, the required buffer is:
// Using Sendto:
// max(CC3000_MINIMAL_TX_SIZE, MAX_DATA + SPI_HEADER_SIZE + SOCKET_SENDTO_PARAMS_LEN + SIMPLE_LINK_HCI_DATA_HEADER_SIZE + 1)
// Using Send():
// max(CC3000_MINIMAL_TX_SIZE, MAX_DATA + SPI_HEADER_SIZE + HCI_CMND_SEND_ARG_LENGTH + SIMPLE_LINK_HCI_DATA_HEADER_SIZE + 1)
// The 1 is used for the overrun detection
#define  CC3000_MINIMAL_TX_SIZE      (118 + 1)
#define CC3000_MAXIMAL_TX_SIZE      (1519 + 1)

So what is the right number for the maximum useful SPI buffer size... 1510 or 1520?

Best regards,

Chris