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cc3200 UART eot IRQ problem

Other Parts Discussed in Thread: CC3200

Hi all. 

I tried to create a Rs485 interface with Cc3200 uart1. Unfortunately there seem to be no mode to create a "transmit enable signal" by hardware, a signal to connect to DE (drive enable) in a Rs485 transceiver. So I use a gpio, setting it before writing data to the transmit fifo. But now, I need an End-of-transmit irq to clear it after complete transmission. Obviously there is one eot-irq, but I never have never seen eot bit beeing set in raw interrupt status Register. 

I use the UART example of cc3200 sdk. Fifos are enabled. Eot bit is cleared in control register, so txris acts upon fifo levels. Eot is set in irq mask register. I expect eot IRQ to trigger, when fifo is empty and all data is sent out. But it doesn't.

Any suggestions? I found no errata for Cc3200. Is there one?

Best regards

Johannes

  • Hi Johannes,

         Post a code snippet so others can get an idea what maybe causing your problem.

         Also, see if it will help if you use UARTTxIntModeSet() C API with mode parameter set to UART_TXINT_MODE_EOT.

    - kel

  • Hello Markel

    Here some code sniplets.

    init:

        MAP_UARTIntDisable(uartBase,0xFFFFFFFF); // disable all
        HWREG(uartBase + UART_O_CTL) = 0;
        MAP_UARTConfigSetExpClk(uartBase,MAP_PRCMPeripheralClockGet(perip),
                                baud, (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
                                UART_CONFIG_PAR_NONE));

        HWREG(uartBase+UART_O_ICR)= UART_ICR_RTIC|UART_ICR_FEIC|UART_ICR_PEIC|UART_ICR_BEIC|UART_ICR_OEIC;
        MAP_UARTModemControlSet(uartBase,UART_OUTPUT_RTS); //Disable TransmitEnable

        MAP_UARTFlowControlSet(uartBase,UART_FLOWCONTROL_NONE); //No Flow control
        MAP_UARTIntRegister(uartBase,UART_Handler);
        MAP_UARTFIFOLevelSet(uartBase, UART_FIFO_TX2_8,UART_FIFO_RX1_8);

        fifo_init(&_rxFifo,_rxbuf,RX_FIFO_SIZE);
        fifo_init(&_txFifo,_txbuf,TX_FIFO_SIZE);

        MAP_UARTIntEnable(uartBase, UART_INT_RT);

        MAP_UARTEnable(uartBase);
        return(0);
    Now only Receive IRQ is active. This works fine. EOT mode is off.

    The concept is for transmitting, that I fill up a software fifo and use "start transmit".
    void BufferedUart_startTransmit(void){
        UARTIntEnable(uartBase,UART_INT_TX);
    }
     
    For this, it is necessary, that UART_INT_TX bit in Raw IRQ Status is set allready. So an TX-IRQ is triggered immediately. The real transmit is done in IRQ.

    static void UART_Handler(){
        volatile uint32_t b;
        while(true){ // this is done in a loop while pending IRQs
            if(MAP_UARTCharsAvail(uartBase)){   //this part covers receiption
                b=MAP_UARTCharGetNonBlocking(uartBase);
                fifo_push_uint8(&_rxFifo,(unsigned char)b);
                continue;
            }
            if((HWREG(uartBase + UART_O_IM) & UART_INT_TX)&&(MAP_UARTSpaceAvail(uartBase))){
                if(fifo_get_used_size(txFifo_p)>0){ //This part copies bytes into transmit-fifo while bytes are still to send and the TX- FIFO isn't full.
                    b=fifo_pull_uint8_nocheck(txFifo_p);
                    MAP_UARTModemControlClear(uartBase,UART_OUTPUT_RTS);
                    MAP_UARTCharPutNonBlocking(uartBase,b);
                }
                else{ //If nothing is left to be copied into TX-Fifo, I try to enable EOT-IRQ
                    MAP_UARTIntEnable(uartBase,UART_INT_EOT);
                    MAP_UARTIntDisable(uartBase,UART_INT_TX);
                }
                continue;
            }
            if(UARTIntStatus(uartBase, true)&UART_INT_EOT){ //this in never reached
                MAP_UARTModemControlSet(uartBase,UART_OUTPUT_RTS); //deactivating TX-Enable on RS485
                MAP_UARTIntClear(uartBase,UART_INT_EOT);
                MAP_UARTIntDisable(uartBase,UART_INT_EOT);
                continue;
            }
            break;
        }
        HWREG(uartBase+UART_O_ICR)= UART_ICR_RTIC|UART_ICR_FEIC|UART_ICR_PEIC|UART_ICR_BEIC|UART_ICR_OEIC;
    }
     
    Your suggestion using UARTxIntModeSet() to MODE EOT is, what I don't want to do.
    As I understand, This bit controls the behaviour of TXRIS. (This could be a workaround. Switching CTRL_EOT on, when nothing left to be copied to TX-Fifo, Then I would get a TXRIS IRQ on EndOfTransmission and can switch off TX-enable on RS485....)
     
    I would rather like to have an IRQ on EOTRIS
    Or do I missunderstand something? is EOTRIS only working, when UARTCTL_EOT is set?
     
    By the way: As you can see, I rely on TXRIS being allready set in UARTRIS, when I use "Start Transmit". Otherwise no IRQ is generated and nothing is send. 
    At the moment, I don't know, if this is always set, when the device comes out of reset. Other devices like Atmel CPUs allow to set the IRQ Status Bits by software to trigger an IRQ manually. Here the status bits are read only. It seems as if the only way to set this bit, is to write data to the TX-Fifo until I exceed the Fifo-threshold and then the level falls below the threshold after having sent out some bytes.
     
    Thanks for your help.
     
    Johannes
     
     
  • Hello All

    I found one setting, which works, but EOTRIS still never occurs.

    static void UART_Handler(){
        volatile uint32_t b;
        while(true){
            if(MAP_UARTCharsAvail(uartBase)){ //Receive events
                b=MAP_UARTCharGetNonBlocking(uartBase);
                fifo_push_uint8(&_rxFifo,(unsigned char)b);
                continue;
            }
            if(UARTIntStatus(uartBase, true)&UART_INT_TX){
                if(fifo_get_used_size(txFifo_p)>0){ //Transmit. Data in soft fifo available -> send them out
                    b=fifo_pull_uint8_nocheck(txFifo_p);
                    MAP_UARTModemControlClear(uartBase,UART_OUTPUT_RTS); //enable Transmit-Enable on RS485
                    MAP_UARTTxIntModeSet(uartBase,UART_TXINT_MODE_FIFO); //switch to FIFO Level IRQ
                    MAP_UARTCharPutNonBlocking(uartBase,b); //send char
                }
                else{
                    if(UARTTxIntModeGet(uartBase)!=UART_TXINT_MODE_EOT){ //nothing to send left
                        MAP_UARTTxIntModeSet(uartBase,UART_TXINT_MODE_EOT); //Switch to EOT Mode wait for end of transmit
                        MAP_UARTIntClear(uartBase,UART_INT_TX);
                        }
                    else{
                        MAP_UARTModemControlSet(uartBase,UART_OUTPUT_RTS); //EOT is reached. TXRIS means EOT. Switch off RTS
                        MAP_UARTIntDisable(uartBase,UART_INT_TX); //disable TX, wait until next "start transmit"
                    }
                }
                continue;
            }
            break;
        }
        HWREG(uartBase+UART_O_ICR)= UART_ICR_RTIC|UART_ICR_FEIC|UART_ICR_PEIC|UART_ICR_BEIC|UART_ICR_OEIC;

    }

    With this IRQ function, I can generate a proper framing signal for RS485 Drive Enable.

    But all experiments with EOTRIS (EOT-IRQ, not using TXRIS) failed so far. I never saw EOTRIS being set.

    It seems, as if this kind of IRQ isn't working at all, or doesn't exist.

    Johannes