Hi.
I am using the Wifi Audio example to start with. I have BCLK, LRCLK and data Out and In from the CC3200. The problem is that I need a Master Clock signal MCLK to add to the existent I2S signals to feed my external DAC, so the MCLK signal created must be 128x or 256x of the LRCLK signal and synchronous. Is there is a way to get this signal out of the CC3200 by code to use the DAC as slave?
I know that I2S clock is derived from 240MHz internal clock using fractional dividers but I could not find any reference in documentation to know if this signal is accesible to the user and it can be sent to an output pin on the chip.
