WL18xxMOD WiLink input transition time requirements on digital signals

Neil Atkinson

The data sheet specifies input transition times should be between 1 and 10ns for the digital I/O, yet there is a sub note that says this "applies to all digital lines except SDIO, UART, I2C, PCM and slow clock lines". What are the input transition time requirements for these signals? I notice there is a rise/fall time requirement for the SDIO clock but can't see anything else.

Regards

Neil

over 10 years ago

0 Joseph Gigi over 10 years ago

TI__Guru* 85400 points

Hi Neil,

We will check and get back to you on this.

Regards,
Gigi Joseph.

0 Joseph Gigi over 10 years ago in reply to Joseph Gigi

TI__Guru* 85400 points

Hi Neil,

The External slow clock transition time is described at section 4.1.3  max 100nS
For SDIO its approximately 3nS and all the rest is up to 10 nS

Regards,
Gigi Joseph.

0 Neil Atkinson over 10 years ago in reply to Joseph Gigi

Intellectual 270 points

Hi Joseph,

Thanks for the information.

Regards

Neil

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WL18xxMOD WiLink input transition time requirements on digital signals