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CC3100 - Ferrite bead placed on the GND trace of the eval board

Other Parts Discussed in Thread: CC3100BOOST, CC3200

Hi,

on page 3 of the schematics of the CC3100BOOST eval board:  cc3100boost_sch_rev4p0-B.pdf

there is Laird-Signal MI0805K400R-10 ferrite 0805 chip placed in series of the GND trace.

I've always seen ferrite chips placed in series of power supply lines.

They force the IC to draw high frequency currents from the local by-pass capacitor and not from the regulator.

Question

Can anybody exaplain me why you put an inductor in series of the GND trace?

Best Regards,

Enrico Migliore

Laird-Signal Integrity Products
  • Hello,


    can anybody answer my question?

    A ferrite chip on the return GND path is quite unusual for me.

    Best Regards,

    Enrico Migliore

  • This is a very interesting observation.

    It is true that Ferrite Bead often in series with the supply voltage of an IC can be used to block spikes which are derived from the IC and thus to prevent a spreading of the spike on the power rail.

    Placing a ferrite bead in series with the Data return does not seem right. In case of an ESD is the shield of the USB cable -which itself is susceptible to ESD- the data return path.
    Instead, it is better to prevent flow through the USB shield.
  • A ferrite bead is not needed on the ground line if the system consists of only a PC/Laptop and the CC3200 Launchpad connected to it over the USB cable. But consider a scenario where you have an instrument connected to measure the RF output using the U.FL connector. Now a big ground loop is formed between the grounded end of the equipment and the grounded end of the PC. Adding this ferrite bead in that loop now minimizes the current in the loop at higher frequencies by increasing the ground loop impedance.

    There will still be a loop formed by the shield of the USB cable along with the grounded instrument, but this can also be avoided by using an RC filter to connect the USB cable shield to the main ground on the board. This is not added on the board and we are adding that on the next revision of the board.
    The loop formed due to the DP and DM lines would still exist but that is un-avoidable. The fact that these would go through high impedance receivers on one side would also help reduce the loop current.

    Since the USB data lines are differential, there should be ideally no return currents on the shield or on the ground. So having a higher impedance on the shield or the ground return should not adversely impact the signal integrity. Also this is a USB full speed device and hence not that susceptible compared to a 480Mbps high speed device.
  • Hi Prajay Madhavan,

    that's an answer!

    Thank you

    Enrico Migliore