Team,
1) We provide some precise power up/down sequence and timings in :
WL18xxMOD HW intergration guide - SWRU437
http://www.ti.com/lit/ug/swru437/swru437.pdf
a) For (2) is there a timings specification between SCLK and WL/BT_EN?
What is the minimum timings for the SCLK rising edge to the Enable signal?
b) (5) tells that SCLK "can be supplied before VBAT/VIO".
Must the CLK be supplied before VBAT/VIO supplies? What minimum timings?
c) Can you clarify what you mean in (4) by "in immaterial"?
2) From the below doc:
Level shifting WL18xx IOS - SWRA448A
http://www.ti.com/lit/an/swra448a/swra448a.pdfIt says that the supply need to be stable:
d) Can you quantify what you mean by stable?
Is it enough to have the supply higher than VIO min and VBAT min for at least 10uS? or is there some specific requirements in term of stability/variation over time?
Thanks in advance,
Anthony