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WL1807MOD: WiFi- SI Simulation and WL1807 IBIS model selection

Part Number: WL1807MOD

Hello
Could you help me respond to my customer on issues during SI sign off process, were they found problems with the Pins (DS0 and DS1) configuration.
They tell me :-

Below are the WiFi SI simulation review feedback

  1. For Write mode, 12mA, slow drive strength is selected for Ultrascale FPGA  and the series termination resistor value (R8 and RN21) needs to be changed to 47 ohms. With this change, we could able to pass the SI for the write mode.
  2. For Read mode, the below highlighted model (BQ18PROGFBPB_H10_PUPDOFF_1P8) is selected for the WL1807 Wifi Transceiver device. With this model, we could able to pass the SI for the Read mode.

 

In summary the Top Model highlighted in Blue Fails but the one Highlighted in Yellow Fails>
Customer believes this is due to DSO and DS1 signals so could we confirm this and let us know what are the differences between these models.

Thanks
Bob Bacon

  • Bob,

    We have assigned your post to the relevant engineer and will get back to you.
  • Hello Bob,

    I apologize it's taking some time.

    I have been consulting with some of our experts concerning this issue

    and still am waiting for some more information before sending you the answer.

    BR,

    Chen Loewy

  • Hello Chen
    Is there any update on this issue yet ?
    Thanks
    Bob
  • Hello Bob,

    Our expert wasn't sure he understood which one passes

    However:

    The internal config for the line should be PUPDOFF.

  • If you look inside the file at the Model Selector, only the options that specify "DS0=1, DS1=0" are valid.  That is based on the internal integration of the device, so this is not user-selectable.  That leaves 3 different models available.  Here's how they should be used:

    • BQ18PROGFBPB_H01_PUPDOFF_1P8: SDIO_CLK, SDIO_D0, SDIO_D1, SDIO_D2.  Any I/O's from the data sheet marked "tri-state" correspond to this.
    • BQ18PROGHHVHYFBPB_H01_PU_1P8: SDIO_D3.  Any I/O's marked "PU" would use this model.
    • BQ18PROGHHVHYFBPB_H01_PD_1P8: WL_IRQ.  Any I/O's marked "PD" would use this model.

    These models above all relate to SDIO writes (i.e. host processor driving the lines and WL18xx as receiver).  For SDIO reads, the WL18xx drives the pins using 4mA drive strength.

    Please be sure any SI modeling is using the correct models as indicated here in this post.