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CC3220: Simplelink linker file sections: Boot from flash does not work

Part Number: CC3220

Hi,

Since we are already running low on available RAM space, I tried to rearrange some sections in the linker file. However, I quickly found out that even though my newly compiled applications worked when uploading through JTAG, they did not work when booting from flash (through the ROM bootloader).

I don't fully understand why though. Is there more info regarding what is required for linker sections?

For example, my current linker file looks like this (and works for JTAG+Flash):

I managed to move the data section to SRAM, but I do not seem to be able to move .cinit or the block surrounding it without causing a freeze at boot from flash! (JTAG works)

The memory visualization tool shows the following for my current linker file:

As you can see, I'd like to also move .cinit to the first part of SRAM0, but that fails.

Am I missing something, or does the bootloader expect sections to be at specific places? (aside from the ISR vectors at 0x20004000)

Thanks for your reply!

  • Hi,

    Lower 16kB RAM you can use for section like (.data, .bss, .stack), because this part of RAM is internally used by bootloder. Bootloader cannot rewrite own RAM memory when is executed.

    Your code need to start from address 0x20004000. The .cinit section is used for initialised of global variables and it is "part of code" and need to be loaded by bootlaoder.

    If you have not enough of RAM you should check:
    - optimization of complier
    - settings of RTOS (disable unused modules)
    - or just simple switch your design to CC3220SF

    Jan
  • Hi Arnout,

    In addition to the info posted above, there are more details provided in the bootloader section of the programmer's guide below:

  • Thanks all for your feedback.