Part Number: CC3220
Tool/software: WEBENCH® Design Tools
I am having trouble getting the footprint file for the CC3220 to convert to Allegro 17.2 through Ultra Librarian. "Cadence Allegro 17.2" or newer is selected in Ultra Librarian, and my cadence is 17.2-2016.
I used ultra librarian to open CC3220_RGK_64.bxl, which opened Allegro 17.2-2016. It ran its script and I saw some warnings and errors.
After the script was completed, I opened the .dra footprint myself. I noticed that there are no vias showing, and I think there are supposed to be some for the centre thermal pad area. There is no solder paste showing on the thermal pad either, though there is paste on the pins around the outside.
Here is the full log from the command window of Allegro after the script has run:
Loading axlcore.cxt
Starting new design...
t
t
Reading Footprint XML
Creating padstacks
Starting new design...
Performing DRC...
Multithreaded DRC update (8 threads).
No DRC errors detected.
Performing a partial design check before saving.
Writing design to disk.
'R10240090000200A.pad' saved to disk.
Starting new design...
Unknown pad shape type "triangle"
Performing a partial design check before saving.
Writing design to disk.
'V10200200080200A.pad' saved to disk.
Starting new design...
Opening Design "RGK0064B.dra"
W- *WARNING* (axlDBCreatePadStack): Figure FIG_RECTANGLE and size (248032 248032)
W- (SPMHA1-102): Illegal figure size.
Starting new design...
Creating Shapes on Package layers
Creating Pins
Creating Vias
Creating package symbol 'C:/UltraLibrarian/Library/Exported/Allegro/2018-09-20_10-42-38/rgk0064b.psm'.
Starting Create symbol...
Symbol Created
Loading cmds.cxt
Loading skillExt.cxt
E- (SPMHDB-182): 'SHAPE' object may not exist on class 'PIN'.
E- (SPMHA1-73): Text line is outside of the extents.
E- (SPMHA1-161): Cannot open the design database file ... run standalone dbdoctor on the file.
E- (SPMHGE-268): create_sym had errors, use Viewlog to review the log file.
E- (SPMHGE-7): Error(s) occurred, check logfile.
Performing a partial design check before saving.
Writing design to disk.
'RGK0064B.dra' saved to disk.
Opening existing design...
Command >
