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wl1271 chip ID read operation fails

Andrea Cattani
Intellectual 380 points
Other Parts Discussed in Thread: OMAP3530, WL1271

Dear all, 

in a custom omap3530 HW project I've connected a LS TIWi module to MMC3.

I'm using the DVSDK driver, patched to work on MMC3 instead of MMC2.

The MMC communication seems to be ok, but I'm not able to read the chip ID. This is the output:

 

SDIO clock Configuration is now set to 24Mhz
After sdioDrv_ConnectBus, iStatus=0
After SD_IO_GO_IDLE_STATE, iStatus=0
After VDD_VOLTAGE_WINDOW, iStatus=0
After SD_IO_SEND_RELATIVE_ADDR, iStatus=0
After SD_IO_SELECT_CARD, iStatus=0
After w 0x82, iStatus=0
After r 0x82, iStatus=0
After w 0xC8, iStatus=0
After CCCR_BUS_INTERFACE_CONTOROL, uCount=1
After CCCR_IO_ENABLE, uCount=1
TIWLAN: 3855.734315: CHIP VERSION... set 1273 chip top registers
TIWLAN: 3855.790589: Error!! Found unknown Chip Id = 0x0
TIWLAN: 3855.806275: Starting to process NVS...
TIWLAN: 3855.811921: No Nvs, Setting default MAC address
TIWLAN: 3855.818360: pHwInit->uEEPROMCurLen: 1c
TIWLAN: 3855.823945: ERROR: If you are not calibating the device, you will soon get errors !!!
TIWLAN: 3855.852326: Chip ID is 0x0.
TIWLAN: 3855.857026: Cannot read ChipID stopping
wlanDrvIf_UpdateDriverState(): State = 4   

 

Any suggestions?

How can I use the debug port in order to read the chip ID or to verify the chip status?

Many thanks

Andrea

 

 

 

 

 

  • 0
    Prodigy 60 points

    Hi Andrea

    SInce the modification is only at the MMC3 this should work fine. However it looks like the issue may be in MMC3 patch. Can you please read register location 0x100 of function 1 and verify whether it is " SDIO WLAN interface". This is to verify the card is enabled properly by MMC3 patch.

     

  • 0 in reply to Aman
    Intellectual 380 points

    Hi Aman,

    I read 0x0 also on register you suggested.

    How can I test more deeply my MMC3 communication?

    I thought it was ok, because I'm able to write ad read back other registers, for instance CCCR_BUS_INTERFACE_CONTROL (0x7).
    Thank you.
    Andrea

  • 0 in reply to Andrea Cattani
    Intellectual 365 points

    Hi Andrea,

    There may be issue for MMC 3 communication. To resolve this problem can you follow the below procedure?

    1. Build the WiLink driver for OMAP35x platform and it will generate "sdio.ko", "bmtarce.ko", "tiwlan_drv.ko" and "testsdio.ko".

    2. Upload the "sdio.ko" and "testsdio.ko" to target hardware.

    3. follow the below procedure:

         # insmod sdio.ko

        # insmod testsdio.ko

        # echo i > /proc/sdio_test                                                << please verify that you are able to read chip ID

     

    This test will confirm the SDIO working status over MMC 3 interface.

     

    Best Regards

    Sanjay

  • 0 in reply to Sanjay Kumar42857
    Intellectual 380 points

    Hi Sanjay,

    Yes, using testsdio I'm able to correctly read the chip ID.

    So , the issue seems to be related to the tiwlan_drv, any suggestion?

     

    Many thanks,

    Andrea

     

  • 0 in reply to Andrea Cattani
    Intellectual 365 points

    Hi Andrea,

    It seems the SDIO interface is working fine for MMC 3 interface. To verify the SDIO interface data communication, please follow below procedure.

         # insmod sdio.ko

        # insmod testsdio.ko

        # echo i > /proc/sdio_test

        # echo cs > /proc/sdio_test             << Verify the data transmission

     

    If all the above procedure is working fine, then SDIO interface is working fine. Please send me the more logs, which produces during the installation WLAN driver installation.

     

    Best Regards

    Sanjay

  • 0 in reply to Sanjay Kumar42857
    Intellectual 380 points

    Hi Sanjay

    Actually, the 'cs' test doesn't work fine, this is the output:

     

    root@yong-20612936:~# echo i > /proc/sdio_test                                                                                                                                                                                                                           

    [  128.757354] SDIO clock Configuration is now set to 24Mhz  

    [  128.763214] After sdioDrv_ConnectBus, iStatus=0                                                                                                                               

    [  128.767852] After SD_IO_GO_IDLE_STATE, iStatus=0                                                                                                                              

    [  128.776977] After VDD_VOLTAGE_WINDOW, iStatus=0                                                                                                                               

    [  128.781646] After SD_IO_SEND_RELATIVE_ADDR, iStatus=0                                                                                                                         

    [  128.787322] After SD_IO_SELECT_CARD, iStatus=0                                                                                                                                

    [  128.791900] After read 0x100: value = 0x2, iStatus=0                                                                                                                          

    [  128.797454] After w 0x82, iStatus=0                                                                                                                                           

    [  128.801361] After r 0x82, iStatus=0                                                                                                                                           

    [  128.804962] After w 0xC8, iStatus=0                                                                                                                                           

    [  128.808990] After CCCR_BUS_INTERFACE_CONTOROL, uCount=1                                                                                                                       

    [  128.814727] After CCCR_IO_ENABLE, uCount=1                                                                                                                                    

    [  128.819702] In sdio_test_init: going to perform set_partition. mem size = 0x16800, mem addr =  0x0, reg size = 0x8800, reg addr = 0x300000                                    

    [  128.832550] Running set_partition status = 0 OK                                                                                                                               

    [  128.837249] Read device ID via ReadByte: 0x4030111                                                                                                                            

    root@yong-20612936:~# echo cs > /proc/sdio_test                                                                                                                                  

    [  135.363922] Perform Synch Complete SDIO                                                                                                                                       

    [  135.367797] ************     SDIO Complete Test, 4 byte block        ************                                                                                             

    [  135.625305] sdiodrv_data_xfer_sync() buffer disabled! length = 4 BLK = 0x4 PSTATE = 0x1770206                                                                                 

    [  135.634399] sdioDrv_ReadSync() FAILED!!                                                                                                                                       

    [  135.638610] sync_gen_compare_test: sdioDrv_ReadSync failed                                                                                                                    

    [  135.895416] sdiodrv_data_xfer_sync() buffer disabled! length = 4 BLK = 0x4 PSTATE = 0x1770206                                                                                 

    [  135.904479] sdioDrv_WriteSync() FAILED!!                                                                                                                                      

    [  135.908447] sync_gen_compare_test: sdioDrv_WriteSync failed                                                                                                                   

    [  136.164093] sdiodrv_data_xfer_sync() buffer disabled! length = 4 BLK = 0x4 PSTATE = 0x1770206                                                                                 

    [  136.173126] sdioDrv_WriteSync() FAILED!!                                                                                                                                      

    [  136.177429] sync_gen_compare_test: sdioDrv_WriteSync failed                                                                                                                   

    [  136.438385] sdiodrv_data_xfer_sync() buffer disabled! length = 4 BLK = 0x4 PSTATE = 0x1770206                                                                                 

    [  136.447509] sdioDrv_WriteSync() FAILED!!                                                                                                                                      

    [  136.451812] sync_gen_compare_test: sdioDrv_WriteSync failed                                                                                                                   

    [  136.703521] sdiodrv_data_xfer_sync() buffer disabled! length = 4 BLK = 0x4 PSTATE = 0x1770206                                                                                 

    [  136.712554] sdioDrv_WriteSync() FAILED!!      

     

    Andrea

     

     

     

  • 0 in reply to Andrea Cattani
    Intellectual 365 points

    Hi Andrea

    From the logs, it is found that the MMC3 implementation isn't complete. The testSdio application is to test the MMC/SDIO implementation and its performance. Currently on OMAP35x, only MMC2 support is available. For debugging and implementation, can you please refer MMC2 sources.

     

    Thanks and Regards

    Sanjay

  • 0 in reply to Sanjay Kumar42857
    Intellectual 380 points

    Hi Sanjay,

    unfortunately on our HW the MMC2 bus is already in use, but now I'm trying to patch a board in order to have TiWi connected on MMC2 to test the standard environment.

    Meanwhile, I executed other test from testsdio on MMC3 and I noticed that only read/write sync/async register word operations work fine, all the other tests fail.

     

    Many thanks.

    Andrea

     

     

  • 0 in reply to Andrea Cattani
    TI__Genius 9240 points

    Hi Andrea,

    How is it going with your side? are you waiting for an answer?

    Thanks,

    Eyal

  • 0 in reply to Eyal a
    Intellectual 380 points

    Hi Eyal,

    The issue status is that I'm not able to use the MMC3 bus with the wl1271 chip.

    As wrote on previous posts, the chip id read operation and the testsdio tests fail.

    In order to add the MMC3 support to the driver, I've modified all the "MMC2" entries in the sdioDrv.c file.

    Do I need to modify something else? Is a MMC3 patch already available?

    Thanks,

    Andrea

     

     

  • 0 in reply to Andrea Cattani
    Expert 2800 points

    Hi Andrea,

    What about MMC3 MUX settings? Can you please look into WiLink/platforms/hw/host_platform_omap3530/linux/ files.  In Beta 2 release, MMC2, WLAN_IRQ and WL_EN MUX settings were done in the file WiLink/platforms/hw/host_platform_omap3530/linux/host_platform.c and host_platform.h. These settings can be done in kernel also.

    Thanks,

    Sinoj

     

     

  • 0 in reply to sinoj issac
    Intellectual 380 points

    Hi Sinoj, 

    MMC3 MUX, WLAN_IRQ and WL_EN are correctly set.

    Actually, the signals seems to be ok, with a scope I'm able to see clock, command and data on the SDIO bus and some "sdiotest" tests work fine.

    Many thanks,

    Andrea

     

     

  • 0 in reply to Andrea Cattani
    Prodigy 135 points

    Andrea,

    Could you please post your patch the enable the TI wifi support on the MMC3 port?

    Regards,

    Shane

  • 0 in reply to Shane Volpe
    Prodigy 135 points

    Andrea,

    I just found the following patch:

    http://lists.infradead.org/pipermail/linux-arm-kernel/2010-September/025920.html

    Is that pretty much what you did to get it working?
    Regards,

    Shane