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CC3220: Antenna Calibration & Pin 3 and 4 GPIO output mode, hibernation status

YOUNG LIN
Intellectual 395 points
Part Number: CC3220


Hello,

It is to consult about the chip CC3220SF, on two aspects:

  • First: about the antenna calibration, I have configured the PHY calibration mode to TRIGGER. During the operation of the chip, sometimes the CC3220SF need to switch between the STATION and AP mode. Will this change (from STA to AP / AP to STA)  enable the antena calibration? , because the device has a limited power supply (with batteries), the high current during the antenna calibration can cause problem.

  • Second: about the pin3 and pin4 of the chip, after reading the datasheet, I think these two pins can be used as normal GPIO pins (output mode). When the chip works normally (NO LPDS, NO HIBERNATION), these 2 pins work correctly, switch the voltage level according to my firmware. But when the CC3220SF enters in hiberation mode, on these 2 pins a 3.3V (supply voltage to CC3220SF) is detected all the time.Is normal this level of voltage (according to the datasheet, I think these outputs should be high impedance with 0V)? Is there any way to change this voltage level to 0V during hibernation mode?

Thanks in advance,

Kind regards,

  • 0
    TI__Mastermind 40965 points
    Hi Yong Zha,

    Changing the operating mode of the device from STA to AP should not trigger PHY calibration. The different calibration modes are explained in section 3.8 of the NWP programmer's guide:
    www.ti.com/.../swru455e.pdf

    When the PHY calibration setting is 'triggered', then PHY calibration should only happen when you change the TX power setting, or if a new servicepack update performs updates to the PHY layer. This should effectively mean that there are no additional calibration cycles beyond the one-time calibration at first boot. Of course, if you wanted to guarantee that further calibration is not performed, then the One-Time calibration mode should be selected.

    As for keeping the GPIO states during hibernate, this should be possible. In the CC3220SF_LAUNCHXL.c file of your project there should be a parkInfo[] struct with the pin parking configurations of all the parkable pins of the CC3220. You will need to ensure that the struct has the settings you want. By default, the power drivers will not use this table during hibernate, and only during LPDS. To fix this you should also modify the .ioRetentionShutdown member of the PowerCC32XX_config struct to be PRCM_IO_RET_GRP_0|PRCM_IO_RET_GRP_1. Do keep in mind that the GPIO parked in this way may glitch during transitions in/out of hibernate, so if you have some device edge-triggered from a CC3220 GPIO it might interrupt unexpectedly.

    Let me know if you need more help or have further questions.

    Regards,
    Michael
  • 0 in reply to Michael Reymond
    Intellectual 395 points

    Hello Michael,

    Thanks for your quick response, the PHY calibration part is very clear now.

    Regarding to the GPIO hibernation mode, I will check my code and do the test this afternoon, then I can confirm and put this issue to close.

    Thanks,

    Best regards,