RTOS/CC3220S: My bootloader cannot run my application code when my application code exceed 81.6KB

Tool/software: TI-RTOS

when my application code is smaller than 81.6KB, it can jump application code. but when applicaiton code exceed 81.6KB, it cannot jump to application code. Does the load code should smaller than heap or stack size?

my SRAM allocate as below:

//          _____________________________ _0x20000000

//         |     ROM Bootloader data                |     (16 KB)

//         |       or RAE Bootloader data            |

//         |_____________________________|_0x20004000

//         |     RAE Bootloader code               |     (64 KB)

//         |------------------------------------------------|-0x20014000

//         |     RAE Bootloader data               |     (32 KB)

//         |------------------------------------------------|-0x2001C000

//         |       Reserved                                |   (8 KB)

//         |------------------------------------------------|-0x2001E000

//        |       RAE Application                      |   (136 KB)          

//         |        code and data                        |

//         |_____________________________|_0x2003FFFF

my bootloader code is below: 

#define APP_IMG_SRAM_OFFSET                 0x2001E000

_i32 LoadAndExecute(unsigned char *ImgName, unsigned long ulToken)
{
_i32 RetVal;
SlFsFileInfo_t pFsFileInfo;
_i32 ImgFileHandle;
// Open the file for reading
ImgFileHandle = sl_FsOpen(ImgName, SL_FS_READ, &ulToken);
if(ImgFileHandle < 0){
UART_PRINT("Open Img file fail\r\n");
return ImgFileHandle;
}
// Get the file size using File Info structure
RetVal = sl_FsGetInfo(ImgName, ulToken,&pFsFileInfo);
ASSERT_ON_ERROR(RetVal, WLAN_ERROR);
if(pFsFileInfo.Len < 51200){//code size should bigger than 50k
UART_PRINT("Img file size Error --\r\n");
RetVal = sl_FsClose(ImgFileHandle, NULL, NULL , 0);
ASSERT_ON_ERROR(RetVal, WLAN_ERROR);
RetVal = sl_FsDel((unsigned char *)ImgName,ulToken);
ASSERT_ON_ERROR(RetVal, WLAN_ERROR);
return -1;
}
// Read the application into SRAM
RetVal = sl_FsRead(ImgFileHandle,0, (unsigned char *)APP_IMG_SRAM_OFFSET,
pFsFileInfo.Len );
ASSERT_ON_ERROR(RetVal, WLAN_ERROR);
// Stop the network services
sl_Stop(0xFFFF);

// Execute the application.
Run(APP_IMG_SRAM_OFFSET);

return 0;
}

My application icf file is below:

//*****************************************************************************
// cc3220s.icf
//
// IAR Linker configuration file.
//
// Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
//
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
//*****************************************************************************

//
// Define a memory region that covers the entire 4 GB addressable space of the
// processor.
//
define memory mem with size = 4G;

//
// Define a region for the on-chip flash.
//
define region FLASH = mem:[from 0x01000000 to 0x0100FFFF];

//
// Define a region for the on-chip SRAM.
// SRAM size of 240KB for CC32XX ES 1.33 device
//define region SRAM = mem:[from 0x20004000 to 0x2003C000];//original
define region SRAM = mem:[from 0x2001E000 to 0x2003FFFF]; // for bootloader use
//
// Define a block for the heap. The size should be set to something other
// than zero if things in the C library that require the heap are used.
//
define block HEAP with alignment = 8, size = 0x00008000 { };
keep {readonly section .cmdtbl};
define block CmdTbl { section .cmdtbl };

//
// Indicate that the noinit values should be left alone. This includes the
// stack, which if initialized will destroy the return address from the
// initialization code, causing the processor to branch to zero and fault.
//
do not initialize { section .noinit };

define symbol STACKSIZE = 1024;
define block CSTACK with alignment = 8, size = STACKSIZE { section .stack };
do not initialize { section .stack };
place at end of SRAM { block CSTACK };

/* HeapMem Primary Heap configuration */
define symbol HEAPSIZE = 0x8000;
define block primary_heap with size = HEAPSIZE {};

/* place heap just before CSTACK */
place at end of SRAM { block primary_heap };

/* define buffer start and end symbols for HeapMem Primary Heap */
define exported symbol __primary_heap_end__ = end(SRAM) - STACKSIZE;
define exported symbol __primary_heap_start__ = __primary_heap_end__ - HEAPSIZE;

//-----------------------------------------------------------
initialize by copy { readwrite };
//-----------------------------------------------------------

//
// Place the interrupt vectors at the start of flash.
// Define Flash = 0 if application doesn't use Flash memory
// else define Flash = 1
//

//-----------------------------------------------------------
place at start of SRAM { readonly section .intvec };
//-----------------------------------------------------------

//
// Place the remainder of the read-only items into flash.
//
place in SRAM { readonly };

//
// Place the RAM vector table at the start of SRAM.
//

//-----------------------------------------------------------
place in SRAM { section VTABLE };
//------------------------------------------------------------

//
// Place all read/write items into SRAM.
//

place in SRAM { block CmdTbl };
place in SRAM { readwrite, block HEAP };