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Original question:

CC3135MOD: SPI Bus Speed between Host processor

CC3135MOD: Inquiry about SPI Host Interface AC spec in datasheet

Takayuki Miyazaki
Genius 10120 points
Part Number: CC3135MOD
Other Parts Discussed in Thread: CC3135

Hi team,

Our customer is developing their system with CC3135MOD and they would like external MCP to communicate CC3135MOD over SPI. Customer is checking " 8.16.1 SPI Host Interface" in datasheet and they are asking the following inquires.

1. Regarding SPI_CLK-latch-timing of write(MOSI data-line)/read(MISO data-line), is both latch-timing Rising-edge ? customer would like to just confirm it

2. Regarding SPI_CLK, which the polarity (High/Low) should customer set it during not communication ?

3. Regarding SPI read (from CC3135MOD), should customer need to discard one-clock-data ? (it seems the first data is always read as zero).

I notice there is not the following description in CC3135MOD datasheet. But, for CC3135 datasheet, it seems this description exists. For #3, I doubt nCS signal timing.

  Ensure that nCS (active-low signal) is asserted 10 ns before the clock is toggled. nCS can be deasserted 10 ns after the clock edge.

And then, I'd like to introduce SDK-WIFI-PLUGIN ( https://www.ti.com/tool/SIMPLELINK-SDK-WIFI-PLUGIN) as reference code, however, I'm not sure which demo-code is better for SPI handling-reference.

Can I have your Expert's advice/comments, please?

Best regards,

Miyazaki

  • 0
    TI__Mastermind 46371 points

    Hi Miyazaki,

    1. It depends on the SPI submode configuration.See Section 8.2.2.2.5 in the CC323x TRM. Ensure that the CC3135 and host MCU use the same SPI submode configuration.

    Although this is the CC323x TRM, we can still refer to this TRM as the CC3135 is essentially a C3235 without the application MCU subsystem. 

    2. Pin 7 and Pin 15 should be low when SPI communication is not active. There are already 100k pull down resistors tied to these signals internal to the module to provision for this requirement.

    3. Data should not be discarded. 

    4. The same footnote applies to the module.

    5. SPI communication is used between host MCU and CC3135 in the SDK examples.

    For more information, see Porting the Host Driver in the NWP guide.

    BR,

    Seong

  • 0 in reply to Seong Kim
    TI__Genius 10120 points

    Helllo Seong,

    Thanks for your clarification. I shared those information with customer, I'd like to wait their feedback for a while.

    Best regards,

    Miyazaki

  • 0 in reply to Takayuki Miyazaki
    TI__Genius 10120 points

    Hi Seong,

    Please let me confirm #2. I checked Pin7 and Pin15 in CC3135MOD datasheet, but those pins are not HOST_SPI_CLK(input) and HOST_SPI_MOSI(input). I understood that HOST_SPI_CLK/HOST_SPI_MOSI should be low when SPI communication is not active. Is my consideration correct?

    Best regards,

    Miyazaki

  • 0 in reply to Takayuki Miyazaki
    TI__Mastermind 46371 points

    Miyazaki,

    Apologies, I was referring to the IC pins 7 and 15, which is SPI_MISO and HOST_INTR.

    HOST_SPI_CLK and HOST_SPI_MOSI does not have to be low when SPI communication is not active.

    BR,

    Seong