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CC3220MODA: SOP settings for CC3220MODA

Aichi Chen
Expert 1580 points
Part Number: CC3220MODA


Hi,

In 3220 EVK, the SOP[1:0} = 001 or 010 are able to boot up without UART connected.

But it CC3220MODASM2MONR, we have 2 condition as below:

1. SOP[2:0] = 010, GPIO_01 & GPIO_02 need to connect to XDS110 debug probe's UART for booting, otherwise it wont boot.

2. SOP[2:0] = 001, it will be able to boot up whatever UART is connected or not.

We think that condition 1 will enter uart download mode without UART connected.

May I know what is the correct setting for SOP in CC3220MODA ? And relate HW schematic if have....

Thanks

  • 0
    Guru 80425 points

    Hi,

    SOP modes are described inside datasheet (table 9-5). Selecting of SOP mode depends on you and needs of your application.

    Answers to your questions:

    1. In SOP mode [2:1:0] = 010 with not connected UART RX pin is this behaviour expected. Bootlaoder mode is determined by the break signal (RX line at low). You should add weak pull-up to RX line and your boot will be OK at SOP mode 010.

    2. I don't see any reason for such behaviour at SOP[2:0] = 001 (FUNCTIONAL_2WJ). Please provide schematic around SOP and JATG/SWD pins.

    Jan

  • 0 in reply to Jan D
    Expert 1580 points

    Thanks for your support.

    The schematic is below:

  • 0 in reply to Jan D
    Expert 1580 points

    Hi,

    Thanks, after hw pull up RX line, it works with SOP[2:0] = 010.

    Btw, is that possible pull up RX line by SW define?

  • 0 in reply to Aichi Chen
    Guru 80425 points

    Hi,

    It is not possible use software control of pull-up. Pin state is scanned by ROM bootloader before your code is executed. And from this reason there is no way how to set internal pull-up by your software. If you have issue with integration of this external pull-up you should use another SOP mode than 0-1-0.

    Few comments to your schematic:

    • Why you have connected MX25Rxx flash to FLASH_SPI_ pins? These pins are dedicated for programming of SPI flash inside module only. You cannot connect SPI flash chip to this pin. If you do this, you will have connected two SPI device at one CS and this cannot work.
    • Recommended value of SOP pull-up resistor is 270 ohm. I don't think your value 1k could cause any issue (I use at my design 1k as well), but maybe you can test with 270 ohm.
    • I know that R11 is NC, but what was original goal of R11 and C8?

    Jan

  • 0 in reply to Jan D
    Expert 1580 points

    I know that R11 is NC, but what was original goal of R11 and C8 <= The customer is just reference to EVK board.

  • 0 in reply to Aichi Chen
    TI__Mastermind 46871 points

    Hi Aichi,

    1. Pin 39 is a no connect. See Table 7-2 in the datasheet.
    2. Is pin35 and pin36 only connected to test points? For pin35 and 36, one of the following connection schemes are recommended:
      1. Connect nRESET (Pin 35) to a GPIO from the host only if nRESET will be in a defined state under all operating conditions. Leave VBAT_RESET (Pin 36) unconnected to save power.
      2. If nRESET (Pin 35) cannot be in a defined state under all operating conditions, connect VBAT_RESET (Pin 36) to the main module power supply (VBAT1 and VBAT2). Due to the internal pull-up resistor, a leakage current of 3.3 V / 100 kΩ is expected in reset.
    3. There are already 100k pull down resistors tied to the SOP pins internal to the module, so remove R14, R16, and R18. As Jan mentioned, use a 270 ohm resistor for SOP pull up
    4. As Jan mentioned, there is already a flash internal to the module so remove U2

    BR,

    Seong