Hello,
The TiWi & WL1271 datasheet shows a power up sequence that is to be followed. (See page 15 of http://www.lsr.com/downloads/tiwi_r2/TiWi_R2_Datasheet.pdf). The diagram shows Vbat rising before Vio, but there is no mention of this in the text, no timing information. Does there really need to be a delay between the two power supplies? If so can you quantify what sort of delay there should be (uS or mS)?
Thanks for the help.
Christopher Hofmeister