CC2530: EIRP & PSD of CC2530+CC2592

Liang Paker

Intellectual 280 points

Part Number: CC2530
Other Parts Discussed in Thread: CC2592, , Z-STACK

Hi,

About CC2530+CC2592 Zigbee Solution, it need CE certification compliance.

When Channel TX power = 10dBm, Max PSD will be 9dBm/MHz;

When Channel TX power = 20dBm, Max PSD will be 18dBm/MHz;

CE cert. limites: EIRP≤ 20dBm, PSD≤ 10dBm/MHz

How to make PSD match CE cert. compliance, with TX power = 20dBm ?

over 4 years ago

0 Ryan Brown1 over 4 years ago

TI__Guru**** 222907 points

Hi Liang,

What Z-Stack version are you using, and are you testing the solution with Zigbee firmware or through SmartRF Studio? I would recommend the latter to confirm that your Z-Stack settings are correct. Did you model your custom board after the CC2530-CC2592EM-RD? There is also an Application Report on the topic and you could furthermore submit your design to SIMPLELINK-2-4GHZ-DESIGN-REVIEWS if you have any outstanding hardware concerns.

Regards,
Ryan

0 Liang Paker over 4 years ago in reply to Ryan Brown1

Intellectual 280 points

Hi Ryan,

Z-Stack version 1.2.2. Testing with SmartRF Studio_7-2.22.0. Our board reference CC2530-CC2592EM-RD.

Please advise, thanks

0 Liang Paker over 4 years ago in reply to Ryan Brown1

Intellectual 280 points

Hi Ryan，

In Application Report，it mentions EIRP must reduce to approximately +12dBm, for meeting CE maximum PSD limit.

Is there any action to allow higher EIRP, and get CE approval?

0 Ryan Brown1 over 4 years ago in reply to Liang Paker

TI__Guru**** 222907 points

You are using all of the correct hardware and design resources. Power output restrictions are a known aspect of CE approval which is not solely limited to this device/platform: There are requirements with regards to ETSI compliance (EN 300 328) that prevent operation at maximum output power. You can further read the ESTI standard to learn more about these restrictions.

Regards,
Ryan

0 Liang Paker over 4 years ago in reply to Ryan Brown1

Intellectual 280 points

Hi Ryan，

Thanks.

With same TX power, is there a setting, that could reduce maximum PSD ?

0 Ryan Brown1 over 4 years ago in reply to Liang Paker

TI__Guru**** 222907 points

If keeping the same TX power settings then you would need to modify the hardware in order to reduce the maximum PSD. This is alluded to in the Application Report when it mentions that the final output power level depends on the antenna used.

Regards,
Ryan

0 Liang Paker over 4 years ago in reply to Ryan Brown1

Intellectual 280 points

The parameter relating PSD is only antenna gain, is that right ?

0 Ryan Brown1 over 4 years ago in reply to Liang Paker

TI__Guru**** 222907 points

The matching circuit is also a consideration. Please refer to this relevant E2E thread: https://e2e.ti.com/f/1/t/821439

Regards,
Ryan

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CC2530: EIRP & PSD of CC2530+CC2592