Other Parts Discussed in Thread: CC2652RB, UNIFLASH, SYSCONFIG
Have taken my zigbee temperature sensor app and added OTA functionality as shown here. However, that tutorial seems to be out of date and would not build with the post-build steps described there. Had to adapt the post-building steps with those from zed_sw_ota_client_offchip_LP_CC2652RB_tirtos7_ticlang.
Current post-build steps:
${CG_TOOL_ROOT}/bin/tiarmobjcopy ${BuildArtifactFileName} --output-target ihex ${BuildArtifactFileBaseName}.hex
${CG_TOOL_ROOT}/bin/tiarmobjcopy ${BuildArtifactFileName} --output-target binary ${BuildArtifactFileBaseName}_oad.bin
${COM_TI_SIMPLELINK_CC13XX_CC26XX_SDK_INSTALL_DIR}/tools/common/oad/oad_image_tool --verbose ccs ${PROJECT_LOC} 7 -hex1 ${ConfigName}/${ProjName}.hex -k ${COM_TI_SIMPLELINK_CC13XX_CC26XX_SDK_INSTALL_DIR}/tools/common/oad/private.pem -o ${ConfigName}/${ProjName}_oad
${COM_TI_SIMPLELINK_CC13XX_CC26XX_SDK_INSTALL_DIR}/tools/zstack/zigbee_ota_image_converter/zOTAfileGen ${PROJECT_LOC}/${ConfigName}/${ProjName}_oad.bin ${PROJECT_LOC}/${ConfigName}/ BEBE 2652 00000001
Don't know if this is relevant, but figured i would mention it. Program builds and runs without error, but i am getting the following warning:
warning #10247-D: creating output section ".ccfg" without a SECTIONS specification
I've added the OTA library and OTA_CLIENT_INTEGRATED code from zed_sw_ota_client_offchip_LP_CC2652RB_tirtos7_ticlang.
I can program my board without issues, but the program gets stuck inside macRadioPowerUpWait according to the callstack:
I don't think this has anything to do with the code added from the sample project as this fails before the BIOS could start the sampleApp task and make any calls to the OTA functions. If i erase the flash and program it with a different project (without any OTA modifications), the board works as expected, thus i do not think there might be any hardware issue.
Could this be caused by some uncaught issue with the post-building steps, app.cfg file or linker configuration file?
Linker file:
/* Retain interrupt vector table variable */
--retain=g_pfnVectors
/* Override default entry point. */
--entry_point ResetISR
/* Allow main() to take args */
--args 0x8
/* Suppress warnings and errors: */
/* - 10063: Warning about entry point not being _c_int00 */
/* - 16011, 16012: 8-byte alignment errors. Observed when linking in object */
/* files compiled using Keil (ARM compiler) */
--diag_suppress=10063,16011,16012
/* The following command line options are set as part of the CCS project. */
/* If you are building using the command line, or for some reason want to */
/* define them here, you can uncomment and modify these lines as needed. */
/* If you are using CCS for building, it is probably better to make any such */
/* modifications in your CCS project and leave this file alone. */
/* */
/* --heap_size=0 */
/* --stack_size=256 */
/* --library=rtsv7M3_T_le_eabi.lib */
/* The starting address of the application. Normally the interrupt vectors */
/* must be located at the beginning of the application. */
#ifndef NVOCMP_NVPAGES
#define NVOCMP_NVPAGES 2
#endif
#define FLASH_BASE 0x00000000
#define FLASH_NV_BASE (0x56000 - (NVOCMP_NVPAGES * 0x2000))
#define FLASH_NV_SIZE (NVOCMP_NVPAGES * 0x2000)
#define FLASH_LAST_BASE 0x56000
#define FLASH_LAST_SIZE 0x2000
#define RAM_BASE 0x20000000
#define RAM_SIZE 0x14000
#define GPRAM_BASE 0x11000000
#define GPRAM_SIZE 0x2000
#define OAD_HDR_START FLASH_BASE
#define OAD_HDR_SIZE 0xA8
#define OAD_HDR_END (OAD_HDR_START + OAD_HDR_SIZE - 1)
#define ENTRY_START (OAD_HDR_END + 1)
#define ENTRY_SIZE 0x40
#define ENTRY_END (ENTRY_START + ENTRY_SIZE - 1)
#define FLASH_START (ENTRY_END + 1)
#define FLASH_END (FLASH_NV_BASE - FLASH_START)
#define FLASH_SIZE (FLASH_END - FLASH_START)
#define PAGE_SIZE 0x2000
/* System memory map */
MEMORY
{
ENTRY (RX) : origin = ENTRY_START, length = ENTRY_SIZE
FLASH_IMG_HDR (RX) : origin = OAD_HDR_START, length = OAD_HDR_SIZE
/* Application stored in and executes from internal flash */
FLASH (RX) : origin = FLASH_START, length = FLASH_SIZE
/* FLASH NV */
FLASH_NV (RWX) : origin = FLASH_NV_BASE, length = FLASH_NV_SIZE
/* Last flash page */
FLASH_LAST (RX) : origin = FLASH_LAST_BASE, length = FLASH_LAST_SIZE
/* Application uses internal RAM for data */
SRAM (RWX) : origin = RAM_BASE, length = RAM_SIZE
/* Application can use GPRAM region as RAM if cache is disabled in the CCFG
(DEFAULT_CCFG_SIZE_AND_DIS_FLAGS.SET_CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM = 0) */
GPRAM (RWX): origin = GPRAM_BASE, length = GPRAM_SIZE
/* Explicitly placed off target for the storage of logging data.
* The data placed here is NOT loaded onto the target device.
* This is part of 1 GB of external memory from 0x60000000 - 0x9FFFFFFF.
* ARM memory map can be found here:
* https://developer.arm.com/documentation/ddi0337/e/memory-map/about-the-memory-map
*/
LOG_DATA (R) : origin = 0x90000000, length = 0x40000 /* 256 KB */
}
/* Section allocation in memory */
SECTIONS
{
GROUP > FLASH_IMG_HDR
{
.image_header //align PAGE_SIZE
}
GROUP > ENTRY
{
.resetVecs LOAD_START(prgEntryAddr)
.intvecs
EntrySection
}
.text : > FLASH
config_const { mac_user_config.o(.rodata) } > FLASH
.const : > FLASH
.constdata : > FLASH
.rodata : > FLASH
.cinit : > FLASH LOAD_END(flashEndAddr)
.pinit : > FLASH
.init_array : > FLASH
.emb_text : > FLASH
.vtable : > SRAM
.vtable_ram : > SRAM
vtable_ram : > SRAM
.data : >> SRAM
.bss : > SRAM
.sysmem : > SRAM
.stack : > SRAM (HIGH)
.nonretenvar : > SRAM
.gpram : > GPRAM
.log_data : > LOG_DATA, type = COPY
}
/* Create global constant that points to top of stack */
/* CCS: Change stack size under Project Properties */
__STACK_TOP = __stack + __STACK_SIZE;
