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increase NV memory

Leo47836
Intellectual 520 points
Other Parts Discussed in Thread: Z-STACK, CC2530

Working on CC2530 with Z-Stack 2.3.0, I would like to increase the NV Memory available from 6 nv pages to 60 nv pages...

I wonder if it is possible knowing that the code memory is 130 529 bytes and I used CC2530 with 256 KB. From what I undersand it remains 125 KB (at least 60 NV pages)

In hal_board_cfg.h : i set :

HAL_NV_PAGE_CNT = 60

I have also modified the link file f8w2520.xcl :

-D_ZIGNV_ADDRESS_SPACE_START=(((_NR_OF_BANKS+1)*_FIRST_BANK_ADR)-0x1E800)
-D_ZIGNV_ADDRESS_SPACE_END=(_ZIGNV_ADDRESS_SPACE_START+0x1E000)

60 * 2048 = 0x1E000

1. I have a compilation issue in OSAL_Nv.c telling me that this following variable is out of range...

uint8 _nvBuf[OSAL_NV_PAGES_USED * OSAL_NV_PAGE_SIZE];

Should it be possible to use the OSAL NV management functions adding new NV pages or should we manage to read & write using HalFlash.c methods?

2. Looking at the .map file, I don't understand why the last bank used is Bank 3 (0x38000 - 0x3FFFF) whereas this flash memory could have 7 banks...

ZIGNV_ADDRESS_SPACE CODE          0003C800 - 0003F7FF        3000   rel    0
IEEE_ADDRESS_SPACE   CODE          0003FFE8 - 0003FFEF           8   rel    0
REGISTERS            DATA          00000000 - 00000007           8   rel    0

Thanks!

  • 0
    TI__Mastermind 19350 points

    First, please upgrade as soon as possible to ZStack 2.5.0 release just recently posted, if you can upgrade your IAR EW8051 to 8.10.

    Speaking of the 8051, that is what is running the CC2530 SOC, and NV access is already costly - walking the pages looking for the item, looking for free space, compacting pages, etc. By increasing to 60 pages, so will severely impact system throughput, so much so that if you are using SECURE, your routers may not even function. So I would highly recommend you to devise a separate NV system for the massive data that you want to store. Be careful about banking - the hal_flash() accessor functions can't handle the case when one continuous read or write crosses a bank boundary.