ASM Code for Sleep cycle

I checked the sleep cycle code and its assembly language, but there are several points I don't understand:

The C code part is:

SLEEP &= ~0x03;  /* clear mode bits */               \
SLEEP |= mode;   /* set mode bits   */               \
asm("NOP");                                          \
asm("NOP");                                          \
 asm("NOP");     

ASM is:

        ANL     0xbe,#0xfc
        MOV     A,0xbe   //I don't understand why MOV A 0xBE(SLEEP reg) since Accuulator will be replaced by MOVX    A,@DPTR later
        MOV     DPTR,#halPwrMgtMode
        MOVX    A,@DPTR
        ORL     A,0xbe
        MOV     0xbe,A
        JC      ??halSleep_19

Anyone can explain my concern in bold letter? Also instruction like ANL takes 4 CPU cycles, will it have race condition if INT comes and clear the SLEEP register?

finally for JC      ??halSleep_19,  what it is used for? to make sure no overflow for sleep register?

Thanks

Rui