linker error in OTA project

KEERTHI G

Expert 2610 points

Other Parts Discussed in Thread: CC2530EM, Z-STACK, MSP430F5438, CC2520, MSP430F5529

Hi Friends,

I am using experimental board to learning about OTA process.

So that I have build the SE SampleApp - In Premise Display - End Device - OTA project.

It produce below linker error.

Error[e16]: Segment HAL_OTA_CHKDL_SEG (size: 0xb0 align: 0x1) is too long for segment definition. At least 0x2 more bytes needed. The problem occurred while processing the segment placement command
"-Z(CODE)HAL_OTA_CHKDL_SEG=0xFD14-0xFDC1", where at the moment of placement the available memory ranges were "CODE:fd14-fdc1"
Reserved ranges relevant to this placement: fd14-fdc1 ?FILL3

Please help me to resolve the error.

Thanks in advance.

Regards,

Keerthi G

over 11 years ago

0 xyzzy over 11 years ago

TI__Expert 5255 points

Please, when posting a question that specifically relates to building a software product, you should always mention the specific product, platform, and compiler you are working with. From the information you did provide, one might guess that you're working with Z-Stack Energy 1.1.0 on the SmartRF05+CC2530EM....

The error you encounter is common - the linker is failing because the memory segment HAL_OTA_CHKDL_SEG is not large enough to hold the code that is supposed to go there. In other words, code size has increased to the point that it no longer fits in the allocated memory segment. A common cause of this error is changing the optimization setting in the IDE project file - Z-Stack ships with optimization set to HIGH which produces the smallest code size. Changing to a lower optimization setting could cause an overflow in a tight memory segment.

0 KEERTHI G over 11 years ago in reply to xyzzy

Expert 2610 points

Hi xyzzy,

Thanks.

I am using MSP430F5438 Experimenter Board with cc2520.

IAR version is 5.60.6.

ZStack-EXP5438-2.5.1

I don't made any changes in existing code. I just build the existing code and it produced the linker error.

Already I have tried the optimization settings. But It doesn't resolve the error.

please see the attached image. it was popped up, when I opened the project first time

Is it problem for this linker error?

Regards,

Keerthi G.

0 Simon Boucher35 over 11 years ago in reply to KEERTHI G

Intellectual 580 points

Hi,

I'm using IAR EW430 5.60.5 with ZStack-EXP5438-2.5.1. I have migrated the stack on a custom board with a MSP430F5529. The stack is working fine. Now I'm trying to migrate the OTA feature on my product.

With the provided SampleLight/SampleSwitchOta example, I encounter the same linker problem. I did not modify the example code. I tried the SampleLight/SampleSwitch basic example, which works fine.

Of course, I adapted the ota.xcl (

Fullscreen 7356.ota.txt Download

/**************************************************************************************************
  Filename:       ota.xcl
  Revised:        $Date: 2010-11-20 08:12:26 -0800 (Sat, 20 Nov 2010) $
  Revision:       $Revision: 24474 $

  Description:    This file is the XLINK command file for the MSP430 IAR C/EC++ Compiler.

  Notes:          This file targets the Texas Instruments MSP430F5529.

  Copyright 2010 Texas Instruments Incorporated. All rights reserved.

  IMPORTANT: Your use of this Software is limited to those specific rights
  granted under the terms of a software license agreement between the user
  who downloaded the software, his/her employer (which must be your employer)
  and Texas Instruments Incorporated (the "License").  You may not use this
  Software unless you agree to abide by the terms of the License. The License
  limits your use, and you acknowledge, that the Software may not be modified,
  copied or distributed unless embedded on a Texas Instruments microcontroller
  or used solely and exclusively in conjunction with a Texas Instruments radio
  frequency transceiver, which is integrated into your product.  Other than for
  the foregoing purpose, you may not use, reproduce, copy, prepare derivative
  works of, modify, distribute, perform, display or sell this Software and/or
  its documentation for any purpose.

  YOU FURTHER ACKNOWLEDGE AND AGREE THAT THE SOFTWARE AND DOCUMENTATION ARE
  PROVIDED �AS IS� WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED,
  INCLUDING WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY, TITLE,
  NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL
  TEXAS INSTRUMENTS OR ITS LICENSORS BE LIABLE OR OBLIGATED UNDER CONTRACT,
  NEGLIGENCE, STRICT LIABILITY, CONTRIBUTION, BREACH OF WARRANTY, OR OTHER
  LEGAL EQUITABLE THEORY ANY DIRECT OR INDIRECT DAMAGES OR EXPENSES
  INCLUDING BUT NOT LIMITED TO ANY INCIDENTAL, SPECIAL, INDIRECT, PUNITIVE
  OR CONSEQUENTIAL DAMAGES, LOST PROFITS OR LOST DATA, COST OF PROCUREMENT
  OF SUBSTITUTE GOODS, TECHNOLOGY, SERVICES, OR ANY CLAIMS BY THIRD PARTIES
  (INCLUDING BUT NOT LIMITED TO ANY DEFENSE THEREOF), OR OTHER SIMILAR COSTS.

  Should you have any questions regarding your right to use this Software,
  contact Texas Instruments Incorporated at www.TI.com.
**************************************************************************************************/

//*****************************************************************
//
// The memory areas of the MSP430F5529 microprocessor:
//
//   Peripheral units:                0 - 0FFF
//
//   Information memory (FLASH):   1800 - 19FF
//
//   Read-write memory (RAM):      2400 - 43FF
//
//   Read-only memory (FLASH):     4400 - FFFF
//                                 10000-243FF
//
//*****************************************************************

//*****************************************************************
//
// The following segments are defined in this linker command file:
//
// Data read/write segments (RAM)
// ==============================
//
// segment     Restrictions    Usage
// -------     ------------    --------------------------
// DATA16_I    < 10000         Data16 initialized variables
// DATA16_Z    < 10000         Data16 zero initialized variables
// DATA16_N    < 10000         Data16 uninitialized variables
// DATA16_HEAP < 10000         Data16 heap used by malloc and free
// DATA20_I                    Data20 initialized variables
// DATA20_Z                    Data20 zero initialized variables
// DATA20_N                    Data20 uninitialized variables
// DATA20_HEAP                 Data20 heap used by malloc and free
// CSTACK      < 10000         Runtime stack
//
//
// Program and data read-only segments (FLASH)
// ===========================================
//
// segment     Restrictions    Usage
// -------     ------------    --------------------------
// INFO                        Information memory
// CSTART      < 10000         Program startup code
// CODE                        Program code
// ISR_CODE    < 10000         Program code for interrupt service routines
// DATA16_C    < 10000         Data16 constant data and string literals
// DATA16_ID   < 10000         Data16 initializers for DATA16_I
// DATA20_C                    Data20 constant data and string literals
// DATA20_ID                   Data20 initializers for DATA20_I

// CHECKSUM    4400-4401       The linker places the checksum byte(s) in this segment.
// CSUM SHDW   4402-4403       The boot code copies checksum here to stop powerup sanity checks.
// INTVEC      4404-4483       Interrupt vectors, re-located to this IVEC2 area.
// Dead Space  4484-448B       Available to linker, but nothing fits?
// Preamble    448C-4497       The OTA 12-byte preamble - placed here for backwards compatibility.
// Program     4498-C9FF       All code restricted to < 0x10000 plus whatever other code fits.
// OSAL NV     CA00-F9FF       Reserving 24 pages for use by OSAL NV.
// OTA Boot    FA00-FE7B       Boot Loader code - shared with IVEC & IVECX areas.
// Locate the IVEC control Xfer routines in ivec.s43 immediately before the IVEC table.
// IVECX       FE80-FF7F       Interrupt vectors, intercepted by boot loader.
// IVEC        FF80-FFFF       Interrupt xfer vectors.
// RESET       FFFE-FFFF       The reset vector.
//
//*****************************************************************

-DIVEC2_BEG=0x4404
-DIVEC2_END=0x4483
-D_LO_ROM_BEG=0x4404
-D_LO_ROM_END=0xC9FF
-D_ZIGNV_BEG=0xCA00
-D_ZIGNV_END=0xF9FF
-D_OTA_BOOT_BEG=0xFA00
-D_OTA_BOOT_END=0xFE7B
-DIVECX_BEG=0xFE80
-DIVECX_END=0xFF7F
-D_HI_ROM_BEG=0x10000
-D_HI_ROM_END=0x243FF

// ---------------------------------------------------------
// Define cpu.

-cmsp430

// ---------------------------------------------------------
// Read-write memory.

-Z(DATA)DATA16_I,DATA16_Z,DATA16_N,DATA16_HEAP+_DATA16_HEAP_SIZE=2400-43FF
-Z(DATA)CSTACK+_STACK_SIZE#

// ---------------------------------------------------------
// Information memory

-Z(CODE)INFO=1800-19FF
-Z(CODE)INFOA=1980-19FF
-Z(CODE)INFOB=1900-197F
-Z(CODE)INFOC=1880-18FF
-Z(CODE)INFOD=1800-187F

-Z(CONST)CRC=4400-4403

// ---------------------------------------------------------
// Interrupt vectors

-Z(CODE)INTVEC=IVEC2_BEG-IVEC2_END
-Z(CODE)RESET=(IVEC2_END-1)-IVEC2_END

-Z(CONST)PREAMBLE=448C-4497

// ---------------------------------------------------------
// Low memory only Code

-Z(CODE)CSTART,ISR_CODE=_LO_ROM_BEG-_LO_ROM_END

// ---------------------------------------------------------
// Internal flash used for NV address space.

-Z(CODE)ZIGNV_ADDRESS_SPACE=_ZIGNV_BEG-_ZIGNV_END

// ---------------------------------------------------------
// Constant data

-P(CONST)DATA16_C,DATA16_ID,DIFUNCT=_LO_ROM_BEG-_LO_ROM_END
-P(CONST)DATA20_C,DATA20_ID=_LO_ROM_BEG-_LO_ROM_END

// ---------------------------------------------------------
// Code

-P(CODE)CODE=_LO_ROM_BEG-_LO_ROM_END,_HI_ROM_BEG-_HI_ROM_END

// The following must coincide with the correspondingly-named *_ADDR definitions in hal_ota.h.
//-Z(CODE)HAL_OTA_CHKDL_SEG=0xFD34-0xFDC1
-Z(CODE)HAL_OTA_CHKDL_SEG=0xFD14-0xFDC1
-Z(CODE)HAL_OTA_INVRC_SEG=0xFDC2-0xFDFB
-Z(CODE)HAL_OTA_AVAIL_SEG=0xFDFC-0xFE03
-Z(CODE)HAL_OTA_READ_SEG=0xFE04-0xFE6F
-Z(CODE)HAL_OTA_WRITE_SEG=0xFE70-_OTA_BOOT_END
-P(CODE)HAL_BOOT_SEG=_OTA_BOOT_BEG-_OTA_BOOT_END
-P(CODE)HAL_XNV_SEG=_OTA_BOOT_BEG-_OTA_BOOT_END

// Table of the IVEC re-directs.
-Z(CODE)IVECX=IVECX_BEG-IVECX_END
// Table of addresses allowing ISR to vector to the IVECX routines in ivec.s43.
-Z(CODE)IVEC=FF80-FFFF

// Fill code gaps with 0xFFFF so that the CRC can be verified programatically.
-HFFFF

) linker file to the 5529 reality. The optimization setting is already defined to HIGH for SIZE.

Please, help me to resolve this issue.

Regards.

0 KEERTHI G over 11 years ago in reply to Simon Boucher35

Expert 2610 points

Hi,

I have modified the below part and it works fine for me.

In ota.xcl

// The following must coincide with the correspondingly-named *_ADDR definitions in hal_ota.h.

-Z(CODE)HAL_OTA_CHKDL_SEG=0xFD0C-0xFDBE
-Z(CODE)HAL_OTA_INVRC_SEG=0xFDBF-0xFDFB
-Z(CODE)HAL_OTA_AVAIL_SEG=0xFDFC-0xFE03
-Z(CODE)HAL_OTA_READ_SEG=0xFE04-0xFE6F
-Z(CODE)HAL_OTA_WRITE_SEG=0xFE70-_OTA_BOOT_END

In hal_ota.h

#define HAL_OTA_CHKDL_ADDR 0xFD0C // 0xFD34
#define HAL_OTA_INVRC_ADDR 0xFDBF // 0xFDC2
#define HAL_OTA_AVAIL_ADDR 0xFDFC //0xFDFC
#define HAL_OTA_READ_ADDR 0xFE04 //0xFE04
#define HAL_OTA_WRITE_ADDR 0xFE70

Regards,

Keerthi G.

0 Simon Boucher35 over 11 years ago in reply to KEERTHI G

Intellectual 580 points

Hi Keerthi,

Thanks a lot for answering. I similarly modified both files (

Fullscreen 0412.ota.txt Download

/**************************************************************************************************
  Filename:       ota.xcl
  Revised:        $Date: 2010-11-20 08:12:26 -0800 (Sat, 20 Nov 2010) $
  Revision:       $Revision: 24474 $

  Description:    This file is the XLINK command file for the MSP430 IAR C/EC++ Compiler.

  Notes:          This file targets the Texas Instruments MSP430F5529.

  Copyright 2010 Texas Instruments Incorporated. All rights reserved.

  IMPORTANT: Your use of this Software is limited to those specific rights
  granted under the terms of a software license agreement between the user
  who downloaded the software, his/her employer (which must be your employer)
  and Texas Instruments Incorporated (the "License").  You may not use this
  Software unless you agree to abide by the terms of the License. The License
  limits your use, and you acknowledge, that the Software may not be modified,
  copied or distributed unless embedded on a Texas Instruments microcontroller
  or used solely and exclusively in conjunction with a Texas Instruments radio
  frequency transceiver, which is integrated into your product.  Other than for
  the foregoing purpose, you may not use, reproduce, copy, prepare derivative
  works of, modify, distribute, perform, display or sell this Software and/or
  its documentation for any purpose.

  YOU FURTHER ACKNOWLEDGE AND AGREE THAT THE SOFTWARE AND DOCUMENTATION ARE
  PROVIDED �AS IS� WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED,
  INCLUDING WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY, TITLE,
  NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL
  TEXAS INSTRUMENTS OR ITS LICENSORS BE LIABLE OR OBLIGATED UNDER CONTRACT,
  NEGLIGENCE, STRICT LIABILITY, CONTRIBUTION, BREACH OF WARRANTY, OR OTHER
  LEGAL EQUITABLE THEORY ANY DIRECT OR INDIRECT DAMAGES OR EXPENSES
  INCLUDING BUT NOT LIMITED TO ANY INCIDENTAL, SPECIAL, INDIRECT, PUNITIVE
  OR CONSEQUENTIAL DAMAGES, LOST PROFITS OR LOST DATA, COST OF PROCUREMENT
  OF SUBSTITUTE GOODS, TECHNOLOGY, SERVICES, OR ANY CLAIMS BY THIRD PARTIES
  (INCLUDING BUT NOT LIMITED TO ANY DEFENSE THEREOF), OR OTHER SIMILAR COSTS.

  Should you have any questions regarding your right to use this Software,
  contact Texas Instruments Incorporated at www.TI.com.
**************************************************************************************************/

//*****************************************************************
//
// The memory areas of the MSP430F5529 microprocessor:
//
//   Peripheral units:                0 - 0FFF
//
//   Information memory (FLASH):   1800 - 19FF
//
//   Read-write memory (RAM):      2400 - 43FF
//
//   Read-only memory (FLASH):     4400 - FFFF
//                                 10000-243FF
//
//*****************************************************************

//*****************************************************************
//
// The following segments are defined in this linker command file:
//
// Data read/write segments (RAM)
// ==============================
//
// segment     Restrictions    Usage
// -------     ------------    --------------------------
// DATA16_I    < 10000         Data16 initialized variables
// DATA16_Z    < 10000         Data16 zero initialized variables
// DATA16_N    < 10000         Data16 uninitialized variables
// DATA16_HEAP < 10000         Data16 heap used by malloc and free
// DATA20_I                    Data20 initialized variables
// DATA20_Z                    Data20 zero initialized variables
// DATA20_N                    Data20 uninitialized variables
// DATA20_HEAP                 Data20 heap used by malloc and free
// CSTACK      < 10000         Runtime stack
//
//
// Program and data read-only segments (FLASH)
// ===========================================
//
// segment     Restrictions    Usage
// -------     ------------    --------------------------
// INFO                        Information memory
// CSTART      < 10000         Program startup code
// CODE                        Program code
// ISR_CODE    < 10000         Program code for interrupt service routines
// DATA16_C    < 10000         Data16 constant data and string literals
// DATA16_ID   < 10000         Data16 initializers for DATA16_I
// DATA20_C                    Data20 constant data and string literals
// DATA20_ID                   Data20 initializers for DATA20_I

// CHECKSUM    4400-4401       The linker places the checksum byte(s) in this segment.
// CSUM SHDW   4402-4403       The boot code copies checksum here to stop powerup sanity checks.
// INTVEC      4404-4483       Interrupt vectors, re-located to this IVEC2 area.
// Dead Space  4484-448B       Available to linker, but nothing fits?
// Preamble    448C-4497       The OTA 12-byte preamble - placed here for backwards compatibility.
// Program     4498-C8FF       All code restricted to < 0x10000 plus whatever other code fits.
// OSAL NV     C900-F8FF       Reserving 24 pages for use by OSAL NV.
// OTA Boot    F900-FE7B       Boot Loader code - shared with IVEC & IVECX areas.
// Locate the IVEC control Xfer routines in ivec.s43 immediately before the IVEC table.
// IVECX       FE80-FF7F       Interrupt vectors, intercepted by boot loader.
// IVEC        FF80-FFFF       Interrupt xfer vectors.
// RESET       FFFE-FFFF       The reset vector.
//
//*****************************************************************

-DIVEC2_BEG=0x4404
-DIVEC2_END=0x4483
-D_LO_ROM_BEG=0x4404
-D_LO_ROM_END=0xC8FF
-D_ZIGNV_BEG=0xC900
-D_ZIGNV_END=0xF8FF
-D_OTA_BOOT_BEG=0xF900
-D_OTA_BOOT_END=0xFE7B
-DIVECX_BEG=0xFE80
-DIVECX_END=0xFF7F
-D_HI_ROM_BEG=0x10000
-D_HI_ROM_END=0x243FF

// ---------------------------------------------------------
// Define cpu.

-cmsp430

// ---------------------------------------------------------
// Read-write memory.

-Z(DATA)DATA16_I,DATA16_Z,DATA16_N,DATA16_HEAP+_DATA16_HEAP_SIZE=2400-43FF
-Z(DATA)CSTACK+_STACK_SIZE#

// ---------------------------------------------------------
// Information memory

-Z(CODE)INFO=1800-19FF
-Z(CODE)INFOA=1980-19FF
-Z(CODE)INFOB=1900-197F
-Z(CODE)INFOC=1880-18FF
-Z(CODE)INFOD=1800-187F

-Z(CONST)CRC=4400-4403

// ---------------------------------------------------------
// Interrupt vectors

-Z(CODE)INTVEC=IVEC2_BEG-IVEC2_END
-Z(CODE)RESET=(IVEC2_END-1)-IVEC2_END

-Z(CONST)PREAMBLE=448C-4497

// ---------------------------------------------------------
// Low memory only Code

-Z(CODE)CSTART,ISR_CODE=_LO_ROM_BEG-_LO_ROM_END

// ---------------------------------------------------------
// Internal flash used for NV address space.

-Z(CODE)ZIGNV_ADDRESS_SPACE=_ZIGNV_BEG-_ZIGNV_END

// ---------------------------------------------------------
// Constant data

-P(CONST)DATA16_C,DATA16_ID,DIFUNCT=_LO_ROM_BEG-_LO_ROM_END
-P(CONST)DATA20_C,DATA20_ID=_LO_ROM_BEG-_LO_ROM_END

// ---------------------------------------------------------
// Code

-P(CODE)CODE=_LO_ROM_BEG-_LO_ROM_END,_HI_ROM_BEG-_HI_ROM_END

// The following must coincide with the correspondingly-named *_ADDR definitions in hal_ota.h.
//-Z(CODE)HAL_OTA_CHKDL_SEG=0xFD34-0xFDC1
-Z(CODE)HAL_OTA_CHKDL_SEG=0xFD14-0xFDC3
-Z(CODE)HAL_OTA_INVRC_SEG=0xFDC4-0xFDFF
-Z(CODE)HAL_OTA_AVAIL_SEG=0xFE00-0xFE03
-Z(CODE)HAL_OTA_READ_SEG=0xFE04-0xFE6F
-Z(CODE)HAL_OTA_WRITE_SEG=0xFE70-_OTA_BOOT_END
-P(CODE)HAL_BOOT_SEG=_OTA_BOOT_BEG-_OTA_BOOT_END
-P(CODE)HAL_XNV_SEG=_OTA_BOOT_BEG-_OTA_BOOT_END

// Table of the IVEC re-directs.
-Z(CODE)IVECX=IVECX_BEG-IVECX_END
// Table of addresses allowing ISR to vector to the IVECX routines in ivec.s43.
-Z(CODE)IVEC=FF80-FFFF

// Fill code gaps with 0xFFFF so that the CRC can be verified programatically.
-HFFFF

) and (hal_ota.h), and now it links.

I must now implement and integrate an external memory driver since the MSP430F5529 provides only 128KB of flash.

Regards,

Simon

0 Simon Boucher35 over 11 years ago in reply to Simon Boucher35

Intellectual 580 points

I adapted the OTA adress and segment values to the Keerthi's values. I also modified other parameters specific to my external memory chip and HAL_BOOT_INIT. See (2843.hal_ota.h) and (

Fullscreen 1205.ota.txt Download

/**************************************************************************************************
  Filename:       ota.xcl
  Revised:        $Date: 2010-11-20 08:12:26 -0800 (Sat, 20 Nov 2010) $
  Revision:       $Revision: 24474 $

  Description:    This file is the XLINK command file for the MSP430 IAR C/EC++ Compiler.

  Notes:          This file targets the Texas Instruments MSP430F5529.

  Copyright 2010 Texas Instruments Incorporated. All rights reserved.

  IMPORTANT: Your use of this Software is limited to those specific rights
  granted under the terms of a software license agreement between the user
  who downloaded the software, his/her employer (which must be your employer)
  and Texas Instruments Incorporated (the "License").  You may not use this
  Software unless you agree to abide by the terms of the License. The License
  limits your use, and you acknowledge, that the Software may not be modified,
  copied or distributed unless embedded on a Texas Instruments microcontroller
  or used solely and exclusively in conjunction with a Texas Instruments radio
  frequency transceiver, which is integrated into your product.  Other than for
  the foregoing purpose, you may not use, reproduce, copy, prepare derivative
  works of, modify, distribute, perform, display or sell this Software and/or
  its documentation for any purpose.

  YOU FURTHER ACKNOWLEDGE AND AGREE THAT THE SOFTWARE AND DOCUMENTATION ARE
  PROVIDED �AS IS� WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED,
  INCLUDING WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY, TITLE,
  NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL
  TEXAS INSTRUMENTS OR ITS LICENSORS BE LIABLE OR OBLIGATED UNDER CONTRACT,
  NEGLIGENCE, STRICT LIABILITY, CONTRIBUTION, BREACH OF WARRANTY, OR OTHER
  LEGAL EQUITABLE THEORY ANY DIRECT OR INDIRECT DAMAGES OR EXPENSES
  INCLUDING BUT NOT LIMITED TO ANY INCIDENTAL, SPECIAL, INDIRECT, PUNITIVE
  OR CONSEQUENTIAL DAMAGES, LOST PROFITS OR LOST DATA, COST OF PROCUREMENT
  OF SUBSTITUTE GOODS, TECHNOLOGY, SERVICES, OR ANY CLAIMS BY THIRD PARTIES
  (INCLUDING BUT NOT LIMITED TO ANY DEFENSE THEREOF), OR OTHER SIMILAR COSTS.

  Should you have any questions regarding your right to use this Software,
  contact Texas Instruments Incorporated at www.TI.com.
**************************************************************************************************/

//*****************************************************************
//
// The memory areas of the MSP430F5529 microprocessor:
//
//   Peripheral units:                0 - 0FFF
//
//   Information memory (FLASH):   1800 - 19FF
//
//   Read-write memory (RAM):      2400 - 43FF
//
//   Read-only memory (FLASH):     4400 - FFFF
//                                 10000-243FF
//
//*****************************************************************

//*****************************************************************
//
// The following segments are defined in this linker command file:
//
// Data read/write segments (RAM)
// ==============================
//
// segment     Restrictions    Usage
// -------     ------------    --------------------------
// DATA16_I    < 10000         Data16 initialized variables
// DATA16_Z    < 10000         Data16 zero initialized variables
// DATA16_N    < 10000         Data16 uninitialized variables
// DATA16_HEAP < 10000         Data16 heap used by malloc and free
// DATA20_I                    Data20 initialized variables
// DATA20_Z                    Data20 zero initialized variables
// DATA20_N                    Data20 uninitialized variables
// DATA20_HEAP                 Data20 heap used by malloc and free
// CSTACK      < 10000         Runtime stack
//
//
// Program and data read-only segments (FLASH)
// ===========================================
//
// segment     Restrictions    Usage
// -------     ------------    --------------------------
// INFO                        Information memory
// CSTART      < 10000         Program startup code
// CODE                        Program code
// ISR_CODE    < 10000         Program code for interrupt service routines
// DATA16_C    < 10000         Data16 constant data and string literals
// DATA16_ID   < 10000         Data16 initializers for DATA16_I
// DATA20_C                    Data20 constant data and string literals
// DATA20_ID                   Data20 initializers for DATA20_I

// CHECKSUM    4400-4401       The linker places the checksum byte(s) in this segment.
// CSUM SHDW   4402-4403       The boot code copies checksum here to stop powerup sanity checks.
// INTVEC      4404-4483       Interrupt vectors, re-located to this IVEC2 area.
// Dead Space  4484-448B       Available to linker, but nothing fits?
// Preamble    448C-4497       The OTA 12-byte preamble - placed here for backwards compatibility.
// Program     4498-C8FF       All code restricted to < 0x10000 plus whatever other code fits.
// OSAL NV     C900-F8FF       Reserving 24 pages for use by OSAL NV.
// OTA Boot    F900-FE7B       Boot Loader code - shared with IVEC & IVECX areas.
// Locate the IVEC control Xfer routines in ivec.s43 immediately before the IVEC table.
// IVECX       FE80-FF7F       Interrupt vectors, intercepted by boot loader.
// IVEC        FF80-FFFF       Interrupt xfer vectors.
// RESET       FFFE-FFFF       The reset vector.
//
//*****************************************************************

-DIVEC2_BEG=0x4404
-DIVEC2_END=0x4483
-D_LO_ROM_BEG=0x4404
-D_LO_ROM_END=0xC8FF
-D_ZIGNV_BEG=0xC900
-D_ZIGNV_END=0xF8FF
-D_OTA_BOOT_BEG=0xF900
-D_OTA_BOOT_END=0xFE7B
-DIVECX_BEG=0xFE80
-DIVECX_END=0xFF7F
-D_HI_ROM_BEG=0x10000
-D_HI_ROM_END=0x243FF

// ---------------------------------------------------------
// Define cpu.

-cmsp430

// ---------------------------------------------------------
// Read-write memory.

-Z(DATA)DATA16_I,DATA16_Z,DATA16_N,DATA16_HEAP+_DATA16_HEAP_SIZE=2400-43FF
-Z(DATA)CSTACK+_STACK_SIZE#

// ---------------------------------------------------------
// Information memory

-Z(CODE)INFO=1800-19FF
-Z(CODE)INFOA=1980-19FF
-Z(CODE)INFOB=1900-197F
-Z(CODE)INFOC=1880-18FF
-Z(CODE)INFOD=1800-187F

-Z(CONST)CRC=4400-4403

// ---------------------------------------------------------
// Interrupt vectors

-Z(CODE)INTVEC=IVEC2_BEG-IVEC2_END
-Z(CODE)RESET=(IVEC2_END-1)-IVEC2_END

-Z(CONST)PREAMBLE=448C-4497

// ---------------------------------------------------------
// Low memory only Code

-Z(CODE)CSTART,ISR_CODE=_LO_ROM_BEG-_LO_ROM_END

// ---------------------------------------------------------
// Internal flash used for NV address space.

-Z(CODE)ZIGNV_ADDRESS_SPACE=_ZIGNV_BEG-_ZIGNV_END

// ---------------------------------------------------------
// Constant data

-P(CONST)DATA16_C,DATA16_ID,DIFUNCT=_LO_ROM_BEG-_LO_ROM_END
-P(CONST)DATA20_C,DATA20_ID=_LO_ROM_BEG-_LO_ROM_END

// ---------------------------------------------------------
// Code

-P(CODE)CODE=_LO_ROM_BEG-_LO_ROM_END,_HI_ROM_BEG-_HI_ROM_END

// The following must coincide with the correspondingly-named *_ADDR definitions in hal_ota.h.
-Z(CODE)HAL_OTA_CHKDL_SEG=0xFD0C-0xFDBE
-Z(CODE)HAL_OTA_INVRC_SEG=0xFDBF-0xFDFB
-Z(CODE)HAL_OTA_AVAIL_SEG=0xFDFC-0xFE03
-Z(CODE)HAL_OTA_READ_SEG=0xFE04-0xFE6F
-Z(CODE)HAL_OTA_WRITE_SEG=0xFE70-_OTA_BOOT_END
-P(CODE)HAL_BOOT_SEG=_OTA_BOOT_BEG-_OTA_BOOT_END
-P(CODE)HAL_XNV_SEG=_OTA_BOOT_BEG-_OTA_BOOT_END

// Table of the IVEC re-directs.
-Z(CODE)IVECX=IVECX_BEG-IVECX_END
// Table of addresses allowing ISR to vector to the IVECX routines in ivec.s43.
-Z(CODE)IVEC=FF80-FFFF

// Fill code gaps with 0xFFFF so that the CRC can be verified programatically.
-HFFFF

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linker error in OTA project