• State Resolved
  • Locked Locked
  • Replies 5 replies
  • Answers 1 answer
  • Subscribers 55 subscribers
  • Views 1962 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

CC2538 : DMA Trigger for GPTimer in PWM mode

Ashwin Nair
Prodigy 160 points

Other Parts Discussed in Thread: CC2538

Hi,

I am able to use GPTimer 2 to generate a PWM output on my CC2538 . Now I am trying to use the DMA to update the Timer A Match register on each time-out. But the DMA transfer does not happen because it is not getting triggered.

Is there any configuration from the timer side/the DMA side that needs to be done to enable the trigger? 

Thanks,

Ashwin

  • 0
    Prodigy 160 points 
    I am posting the code also here. Am I missing something here? 






    .
    .
    .
    .

    REG(SYS_CTRL_RCGCGPT) |= SYS_CTRL_RCGCGPT_GPT2; /* Enable module clock for the GPTx in Active mode */ 
REG(GPT_2_BASE + GPTIMER_CTL) = 0; /* Stop the timer */
REG(GPT_2_BASE + GPTIMER_CFG) = 0x04; /* Use 16-bit timer */ 
REG(GPT_2_BASE + GPTIMER_TAMR) = 0; /* Configure PWM mode */ 
REG(GPT_2_BASE + GPTIMER_TAMR) |= GPTIMER_TAMR_TAAMS |GPTIMER_TAMR_TAMRSU | GPTIMER_TAMR_TAILD; 
REG(GPT_2_BASE + GPTIMER_TAMR) |= GPTIMER_TAMR_TAMR_PERIODIC | GPTIMER_TAMR_TAPWMIE; 
REG(GPT_2_BASE + GPTIMER_TAILR) = 0x28; /* Set the start value (period), count down */ 
    nvic_interrupt_enable(NVIC_INT_GPTIMER_2A); 
    
REG(GPT_2_BASE + GPTIMER_TAMATCHR) = g_buffTimerval[0];/* Set the deassert period */ 
REG(GPTIMER_CTL + GPT_2_BASE ) |= GPTIMER_CTL_TAEN; // Timer is enabled to trigger the raw timer time-out interrupt 

    udma_set_channel_assignment(14, UDMA_CH14_TIMER2A); 
udma_channel_disable(14); 
udma_channel_prio_set_default(14); 
udma_channel_use_primary(14); 
udma_channel_mask_clr(14); 
udma_channel_use_single(14); 
udma_set_channel_src(14, g_buffTimerval + 23 * 4); 
udma_set_channel_dst(14, (uint32_t)(GPT_2_BASE + GPTIMER_TAMATCHR)); 
udma_set_channel_control_word(14,UDMA_CHCTL_ARBSIZE_1|UDMA_CHCTL_XFERMODE_BASIC| UDMA_CHCTL_SRCSIZE_32 | UDMA_CHCTL_DSTSIZE_32 | UDMA_CHCTL_SRCINC_32|   UDMA_CHCTL_DSTINC_NONE| udma_xfer_size(23)); 
udma_channel_enable(14);

      .

      .

      .

     Ashwin

  • 0 in reply to Ashwin Nair
    Prodigy 160 points

    Hi,

    I was able to solve the issue. Hence marking this post as closed.

    Ashwin

  • 0 in reply to Ashwin Nair
    Guru 735705 points
    Would you mind sharing how you solve the issue to benefit others have similar issue?
  • 0 in reply to YiKai Chen
    Prodigy 160 points
    The timer in PWM mode does not seem to have a timeout trigger which can be used by the uDMA . I had to use another timer in normal mode to trigger a timeout event and use this to trigger the transfer to the PWM timer register.

    If someone else has a better solution please do let me know.

    Thanks,
    Ashwin
  • 0 in reply to Ashwin Nair
    Guru 735705 points
    Thanks for sharing!!