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CC2538: Pan Id being reset on every startup with CC2538 ZNP without SBL with ZDSECMGR_TC_DEVICE_MAX=200 (Urgent)

Part Number: CC2538
Other Parts Discussed in Thread: CC2592, Z-STACK

The flags im using are the following

USB_SETUP_MAX_NUMBER_OF_INTERFACES=5
xHAL_SPI=TRUE
HAL_UART=TRUE
BDB_FINDING_BINDING_CAPABILITY_ENABLED=0
DISABLE_GREENPOWER_BASIC_PROXY
TC_LINKKEY_JOIN
ewarm
CC2538_USE_ALTERNATE_INTERRUPT_MAP=1
CC2538ZNP
ZNP_ALT
xPOWER_SAVING
FEATURE_SYSTEM_STATS
FEATURE_RESET_MACRO
ZDNWKMGR_MIN_TRANSMISSIONS=0
MT_UART_DEFAULT_OVERFLOW=FALSE
ASSERT_RESET
FAKE_CRC_SHDW
ENABLE_MT_SYS_RESET_SHUTDOWN
HAL_KEY=FALSE
HAL_LCD=FALSE
HAL_LED=FALSE
HAL_SPI=FALSE
HAL_ADC=FALSE
NWK_MAX_DEVICE_LIST=200
CONCENTRATOR_ENABLE=1
CONCENTRATOR_DISCOVERY_TIME=180
CONCENTRATOR_ROUTE_CACHE=1
MAX_RTG_SRC_ENTRIES=200
SRC_RTG_EXPIRY_TIME=255
MTO_RREQ_LIMIT_TIME=5000
NWK_LINK_STATUS_PERIOD=80
ZDSECMGR_TC_DEVICE_MAX=200
NP_SPI_NODEBUG
MT_AF_CB_FUNC
MT_ZDO_MGMT
MT_ZDO_EXTENSIONS
MT_ZDO_CB_FUNC
MT_NWK_FUNC
MT_APP_CNF_FUNC
MT_SAPI_FUNC
MT_SAPI_CB_FUNC
MT_SYS_FUNC
MT_SYS_KEY_MANAGEMENT
MULTICAST_ENABLED=FALSE
HAL_PA_LNA_CC2592
NV_RESTORE=1

using on UART without flow control.

Made changes according to this post e2e.ti.com/.../2799808 with no luck. Unlocked the complete 32Kb ram as im using it in coordinator mode and it is going to be continuously powered. Have made the necessary changes suggested in processors.wiki.ti.com/.../Zigbee_Known_Issues_and_Proposed_Fixes

NWK_MAX_DEVICE_LIST=140
MAX_RTG_SRC_ENTRIES=140
ZDSECMGR_TC_DEVICE_MAX=140

 its working fine when the above values are set to 140, beyond this im having an issue. Attached the CC2538.icf linker file in txt format

//*****************************************************************************
//
// Linker configuration file for CC2538.
//
// Copyright (c) 2012-2013 Texas Instruments Incorporated.  All rights reserved.
//
//*****************************************************************************

//
// Define a memory region that covers the entire 4 GB addressible space of the
// processor.
//
define memory mem with size = 4G;

//
// Define a region for the on-chip program code space.
//
define region FLASH = mem:[from 0x00200000 to 0x002797FF];

//
// Define a region for the OTA CRC structure.
//
//define region CRC = mem:[from 0x002001EC to 0x002001F3];

//
// Define a region for the OTA Preamble structure.
//
//define region PREAMBLE = mem:[from 0x002001F4 to 0x002001FF];

//
// Define a region for the NVIC table that is 512-byte aligned.
//
//define region INTVEC = mem:[from 0x00200200 to 0x002003FF];

//
// Define a region for the on-chip non-volatile (NV) memory.
//   "HAL_NV_PAGE_CNT" pages of on-chip flash memory (originally 6 pages) are
//   designated for Z-Stack NV items to be stored outside program code space.
//   The size of this region MUST MATCH the size defined by "HAL_NV_PAGE_CNT"
//   in the file: hal_board_cfg.h
//
define region NV_MEM = mem:[from 0x00279800 to 0x0027F7FF];

//
// Define regions for on-chip factory Commissioning Parameters.
//   One page of on-chip flash memory (originally page 255) is designated
//   for various parameters to be "commissioned" outside program code space.
//
// Key-Establishment "Implicit Certificate 283"
define region CP_IMPC_283 = mem:[from 0x0027FED4 to 0x0027FF1F];
//
// Key-Establishment "Certificate Authority Public Key 283"
define region CP_CAPK_283 = mem:[from 0x0027FF20 to 0x0027FF47];
//
// Key-Establishment "Device Private Key 283"
define region CP_DEPK_283 = mem:[from 0x0027FF48 to 0x0027FF6B];
//
// Key-Establishment "Implicit Certificate"
define region CP_IMPC = mem:[from 0x0027FF6C to 0x0027FF9B];
//
// Key-Establishment "Certificate Authority Public Key"
define region CP_CAPK = mem:[from 0x0027FF9C to 0x0027FFB3];
//
// Key-Establishment "Device Private Key"
define region CP_DEPK = mem:[from 0x0027FFB4 to 0x0027FFCB];
//
// Device's unique 64-bit IEEE address
define region CP_IEEE = mem:[from 0x0027FFCC to 0x0027FFD3];


//
// Define a region for Customer Configuration Area in flash.
define region FLASH_CCA = mem:[from 0x0027FFD4 to 0x0027FFDF];

//
// Define the region for Lock Bits in flash.
define region FLASH_LCK = mem:[from 0x0027FFE0 to 0x0027FFFF];

//
// Define the region for Image Boot Manager (IBM) Ledger Page.
//define region LEDGER_PAGE = mem:[from 0x0027C000 to 0x0027C7FF];

//
// Define the region for Image Boot Manager (IBM)
//define region BOOTLOADER_PAGE = mem:[from 0x0027F800 to 0x0027FD00];

//
// Define a region for the on-chip SRAM.
//
define region SRAM = mem:[from 0x20000000 to 0x20007FFF];

//
// Define a block for the heap.  The size should be set to something other
// than zero if things in the C library that require the heap are used.
//
define block HEAP with alignment = 8, size = 0x00000100 { };

//
// Indicate that the read/write values should be initialized by copying from
// flash.
//
initialize by copy { readwrite };

//
// Indicate that the noinit values should be left alone.  This includes the
// stack, which if initialized will destroy the return address from the
// initialization code, causing the processor to branch to zero and fault.
//
do not initialize { section .noinit };
place at end of SRAM { section .noinit };

//
// Place the OTA CRC structure.
//
//place at start of CRC { readonly section .crc };

//
// Place the OTA Preamble structure.
//
//place at start of PREAMBLE { readonly section .preamble };

//
// Place the interrupt vectors.
//
place at start of FLASH { readonly section .intvec };

//
// Place the cca area at the end of flash.
//
place at start of FLASH_CCA { readonly section .cca };

//
// Place the commissioning parameter items.
//
place at start of CP_IEEE { readonly section IEEE_ADDRESS_SPACE };
place at start of CP_DEPK { readonly section DEV_PRIVATE_KEY_ADDRESS_SPACE };
place at start of CP_CAPK { readonly section CA_PUBLIC_KEY_ADDRESS_SPACE };
place at start of CP_IMPC { readonly section IMPLICIT_CERTIFICATE_ADDRESS_SPACE };
place at start of CP_DEPK_283 { readonly section PRIV_KEY_283_ADDRESS_SPACE };
place at start of CP_CAPK_283 { readonly section CA_PUB_KEY_283_ADDRESS_SPACE };
place at start of CP_IMPC_283 { readonly section IMPL_CERT_283_ADDRESS_SPACE };

//
// Place the remainder of the read-only items into flash.
//
place in FLASH { readonly };

//
// Place the RAM vector table at the start of SRAM.
//
place at start of SRAM { section VTABLE };

//
// Place all read/write items into SRAM.
//
place in SRAM { readwrite, block HEAP };

//
// Place the ledger page, if it's defined
//
//place at start of LEDGER_PAGE { section .ledger };
//do not initialize { section .ledger };

//
// Place the bootloader page, if it's defined startup_ewarm
//
//place at start of BOOTLOADER_PAGE { section .bootloader };

  • I suppose you should use “NV_RESTORE” instead of “NV_RESTORE=1” and I suspect your host reset network so it start a new network with new PANID. Can you elaborate what you do on host application when power cycled.
  • The same host code is properly functioning when the value is 140.

    On the host im reading the nvitem is ZNP configured (0x0F00), and then read the network configuration and if any of the parameters fail with not configured error error:2, i consider a half written configuration and reset the NV memory and restart the chip and repeat the process.

    Do the NV idschange if i go above 140, bcoz of which i am reading wrong values?
  • What do you mean “The same host code is properly functioning when the value is 140” ? Which value 140 do you mean here?
  • My bad, i had explained in the post on the other account.

    NWK_MAX_DEVICE_LIST=140
    MAX_RTG_SRC_ENTRIES=140
    ZDSECMGR_TC_DEVICE_MAX=140

    These above values set to 140, the code starts functioning normally as expected with the same host code used when the values are set to 200. Some additional settings info, i ave set the maxmemheap = 12144 when set to 200.

  • Do you have sniffer log for this issue?

  • No sniffer log, im just checking on the ZNP host by printing the panId value. Im using the MT_SAPI, ZB_GET_DEVICE_INFO command to get the network details and print them.

  • , let me know what info you will need, i can post them.
  • Please provide sniffer log to elaborate your issue on it.
  • Any updates? Which version of Z-Stack are you using for the ZNP?
  • Is it stack overflow?
  • Hi, reddy.
    I think that "NWK_MAX_DEVICE_LIST=200" means that there are 200 devices that can connect directly to the coordinator. I recommend setting NWK_MAX_DEVICE_LIST to within 40 to reduce the pressure on the coordinator to cache messages for enddevice.
  • This issue is related to memory constrains. Are you trying to just have 200 devices in a centralized network or are you trying to associate 200 devices directly to the coordinator?

    With the changes that you already made like setting HAL_NV_PAGE_CNT to 12 and OSAL_NV_PHY_PER_PG to 2, try using these values.

    NWK_MAX_DEVICE_LIST=20               //Zstack default
    MAX_RTG_SRC_ENTRIES=12              //Zstack default
    ZDSECMGR_TC_DEVICE_MAX=200

    In this way the coordinator will be able to hold Trust Center Link Keys for 200 devices. Then you can adjust other values according to your topology requirements because there is no value on increasing NWK_MAX_DEVICE_LIST or MAX_RTG_SRC_ENTRIES for example if this values are not critic for your network stability or to get an specific topology. Without an specific reason to increase these values you will be just wasting memory.   

  • I need the MAX_RTG_SRC_ENTRIES=200 to be equal to maximum number of devices because i have two way communication between devices and without source routing cache enabled, it is causing route discovery on every coordinator to device communication.

    Also tested the following values:

    NWK_MAX_DEVICE_LIST=80 //Zstack default
    MAX_RTG_SRC_ENTRIES=200 //Zstack default
    ZDSECMGR_TC_DEVICE_MAX=200

    These values work fine. Also before i was setting MAX_RTG_ENTRIES=140, what significance does this define have on the stack.
  • MAX_RTG_SRC_ENTRIES defines how many entries you will have in the routing table. This table holds information related to the next hop address on the way to the destination. Usually is not required to have this table as large as the nodes that will be in the network because the coordinator will not be sending messages to all devices all the time.

    On the other hand ZDSECMGR_TC_DEVICE_MAX stands for the number of Trust Center Link Keys that the coordinator can hold. This affects directly the devices that can be added since each node requires this key so when you run out of space for keys then no more new devices can be added to that network.
  • MAX_RTG_SRC_ENTRIES  - this i need it to be that because my use case the coordinator sends messages to device at once and the number varies so if the route ends up not being present, it initiates a route discovery which is a concern for me.

    ZDSECMGR_TC_DEVICE_MAX  - this im aware, my question was more about what MAX_RTG_ENTRIES is used for and what is the difference between MAX_RTG_SRC_ENTRIES and MAX_RTG_ENTRIES when source routing is enabled on the coordinator.

  • MAX_RTG_SRC_ENTRIES stands for Source Routing table entries that holds the relay list of short addresses to reach destination.

    MAX_RTG_ENTRIES stands for Routing table that holds only the next hop address on the way to destination.