"Best power tips" e-book
Authors:
Aki Li Benjamin Genereaux Bosheng Sun Brent McDonald Brian King Desheng Guo John Betten John Dorosa Josh Mandelcorn Pradeep Shenoy Richard Yin Robert Kollman Robert Taylor Sheng-Yang Yu
I find no contact information…
Part Number: UC3843 Hi, I have attached the schematic and transformer details of a UC3843 based power supply.
However, when I power ON the SMPS with 20VC, there is no output .
Kindly advise a step by step procedure to see why he power supply is not…
Part Number: BQ76940 Good day, I had just finished soldering components into my board ( https://e2e.ti.com/support/power-management/f/196/t/771358 ), and would like to ask if there's anything I should take into account before actually powering up my board…
Part Number: BQ25570 Hello charger folks,
My customer is designing a solar related products, they have finished the BQ25570 schematic. please help to review the schematic then give your valuable comments. Thanks!
DRV = 14V à appears across Primary of T1 during T ON Period
VDD = 9 to 35V , say 20Và appears across Primary of T1 in reverse direction during T OFF Period.
Let’s assume 40% or 50% duty cycle, how it would satisfy the Volt seconds rule? Could…
Part Number: CC2640 Tool/software: TI C/C++ Compiler Hello experts,
I'm working on a software on a custom board that has CC2640. Our goal is to achieve 3 day run-time,however, we're only able to run it around~13 hours on 3.7V battery.
My code involves…
Can we open this back up? Now that we have the new design back with what we think is right per the datasheet for caps the processor doesn't come up at all until the reset button is pushed. It comes up with the jtagger connected which is providing 3.3…
so what exactly kind of core material is been talking about in this power tip?
why the higher the frequency, the lower the copper loss with the same dc current and ac current on the inductor?
I believe that this tip within Power Designer that says that the EADC sampling window is 80 nsec duration isn't correct. Multiple other sources say that the sampling window duration is 32 nsec.
Hi Shotaro-san,
Please refer section 7 for all the Layout related documentation. FYI, it is highly recommended to use 4-layer board for better thermals.
Collection of TI Buck App Notes.pdf
Regards,
Gautam
