Hi,
I am working with AM3715, and a FPGA is connected to processor on GPMC bus, on synchronous burst mode. As a hardware guy, I using u-boot instead of real linux to verify the communication between CPU and FPGA.
I found that the mw.l and md.l command of u-boot can only trigger a burst operation with burst length = 2. Some topic (http://e2e.ti.com/support/dsp/omap_applications_processors/f/447/t/36314.aspx) in E2E forum has mentioned using u64 pointer can trigger 4-word burst, but I still measured 2 consecutive burst operations, each burst length is 2. I have set up the GPMC register, and following are my codes. Can any one give me some ideas about how to trigger a 4-word burst in U-Boot (Non-DMA mode)?
Regards,
Jun Ma
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/*
* GPMC configuration for FPGA-CPU communication
* based on CORE_L3_ICLK = GPMC_FCLK = 200MHz
*/
#define FPGA_ACCESS_GPMC_CONFIG1 0x7d671202
#define FPGA_ACCESS_GPMC_CONFIG2 0x000a0d00
#define FPGA_ACCESS_GPMC_CONFIG3 0x00030300
#define FPGA_ACCESS_GPMC_CONFIG4 0x03000d05
#define FPGA_ACCESS_GPMC_CONFIG5 0x030b0b0e
#define FPGA_ACCESS_GPMC_CONFIG6 0x88050384
#define FPGA_ACCESS_GPMC_CONFIG7 0x00000f60
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/* Trigger a burst READ (LEN = 4) to FPGA on GPMC bus */
void fpga_reg_access_test(void)
{
u64* pVal;
u64* ptr = (u64*)(CONFIG_FPGA_COMM_BASE);
u32 a, b;
pVal = (u64*)malloc(sizeof(u64));
*pVal = *ptr;
a = (u32)(*pVal);
b = (u32)((*pVal) >> 32);
printf("Read FPGA reg value: 0x%08x 0x%08x\n", b, a);
}
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